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Ticket #12955: nvidia.10de_0240_000500.0.5.log

File nvidia.10de_0240_000500.0.5.log, 203.0 KB (added by vidrep, 3 years ago)

Line
1	ACCELERANT_MODE_COUNT: the modelist contains 288 modes
2	GET_MODE_LIST: exporting the modelist created before.
3	GET_ACCELERANT_DEVICE_INFO: returning info
4	PROPOSEMODE: Haiku screenprefs tunnel detected.
5	Haiku: tunnel access target=swap, command=get, value=0
6	Haiku: tunnel access target=usepanel, command=get, value=0
7	Haiku: tunnel access target=tvstandard, command=get, value=0
8	Haiku: tunnel access target=swap, command=get, value=0
9	Haiku: tunnel access target=usepanel, command=get, value=0
10	Haiku: tunnel access target=tvstandard, command=get, value=0
11	GET_EDID_INFO: EDID info not available
12	Haiku: tunnel access target=usepanel, command=get, value=0
13	Haiku: tunnel access target=tvstandard, command=get, value=0
14	Haiku: tunnel access target=tvstandard, command=get, value=0
15	GET_EDID_INFO: EDID info not available
16	Haiku: tunnel access target=swap, command=get, value=0
17	Haiku: tunnel access target=usepanel, command=get, value=0
18	Haiku: tunnel access target=tvstandard, command=get, value=0
19	GET_EDID_INFO: EDID info not available
20	GET_ACCELERANT_DEVICE_INFO: returning info
21
22	GET_ACCELERANT_DEVICE_INFO: returning info
23	Haiku: tunnel access target=swap, command=get, value=0
24	Haiku: tunnel access target=usepanel, command=get, value=0
25	Haiku: tunnel access target=tvstandard, command=get, value=0
26	Haiku: tunnel access target=swap, command=get, value=0
27	Haiku: tunnel access target=usepanel, command=get, value=0
28	Haiku: tunnel access target=tvstandard, command=get, value=0
29	GET_EDID_INFO: EDID info not available
30	Haiku: tunnel access target=usepanel, command=get, value=0
31	Haiku: tunnel access target=tvstandard, command=get, value=0
32	Haiku: tunnel access target=tvstandard, command=get, value=0
33	GET_EDID_INFO: EDID info not available
34	Haiku: tunnel access target=swap, command=get, value=0
35	Haiku: tunnel access target=usepanel, command=get, value=0
36	Haiku: tunnel access target=tvstandard, command=get, value=0
37	GET_EDID_INFO: EDID info not available
38	GET_ACCELERANT_DEVICE_INFO: returning info
39	GET_ACCELERANT_DEVICE_INFO: returning info
40	Haiku: tunnel access target=swap, command=get, value=0
41	Haiku: tunnel access target=usepanel, command=get, value=0
42	Haiku: tunnel access target=tvstandard, command=get, value=0
43	Haiku: tunnel access target=swap, command=get, value=0
44	Haiku: tunnel access target=usepanel, command=get, value=0
45	Haiku: tunnel access target=tvstandard, command=get, value=0
46	GET_EDID_INFO: EDID info not available
47	Haiku: tunnel access target=usepanel, command=get, value=0
48	Haiku: tunnel access target=tvstandard, command=get, value=0
49	Haiku: tunnel access target=tvstandard, command=get, value=0
50	GET_EDID_INFO: EDID info not available
51	Haiku: tunnel access target=swap, command=get, value=0
52	Haiku: tunnel access target=usepanel, command=get, value=0
53	Haiku: tunnel access target=tvstandard, command=get, value=0
54	GET_EDID_INFO: EDID info not available
55	GET_ACCELERANT_DEVICE_INFO: returning info
56	GET_EDID_INFO: EDID info not available
57	Haiku: tunnel access target=swap, command=get, value=0
58	Haiku: tunnel access target=usepanel, command=get, value=0
59	Haiku: tunnel access target=tvstandard, command=get, value=0
60	Haiku: tunnel access target=swap, command=set, value=0
61	SETMODE: (ENTER) initial modeflags: $0000015f
62	SETMODE: requested target pixelclock 65178kHz
63	SETMODE: requested virtual_width 1024, virtual_height 768
64	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
65	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
66	DAC: NV4/NV10/NV20 restrictions apply
67	DAC: pix VCO frequency found 521.428589Mhz
68	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
69	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
70	PROPOSEMODE: initial modeflags: $0000015f
71	PROPOSEMODE: validated modeflags: $0000015f
72	PROPOSEMODE: completed successfully.
73	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
74	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
75	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
76	SETMODE: setting DUALHEAD mode
77	INIT: switching CRTC/DAC use to be straight-through
78	SETMODE: target clock 65178kHz
79	DAC: NV4/NV10/NV20 restrictions apply
80	DAC: pix VCO frequency found 521.428589Mhz
81	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
82	DAC: dumping current pixelPLL settings:
83	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
84	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
85	DAC: phase discriminator frequency is 1.785714Mhz
86	DAC: VCO frequency is 521.428589Mhz
87	DAC: pixelclock is 65.178574Mhz
88	DAC: end of dump.
89	DAC: current NV30_PLLSETUP settings: $00000000
90	DAC: current (0x0000c040) settings: $340bc003
91	DAC: Setting PIX PLL for pixelclock 65.178001
92	DAC: PIX PLL frequency should be locked now...
93	SETMODE: target2 clock 65178kHz
94	DAC2: NV10/NV20 restrictions apply
95	DAC2: pix VCO frequency found 521.428589Mhz
96	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
97	DAC2: dumping current pixelPLL settings:
98	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
99	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
100	DAC2: phase discriminator frequency is 1.785714Mhz
101	DAC2: VCO frequency is 521.428589Mhz
102	DAC2: pixelclock is 65.178574Mhz
103	DAC2: end of dump.
104	DAC2: current NV30_PLLSETUP settings: $00000000
105	DAC2: current (0x0000c040) settings: $340bc003
106	DAC2: Setting PIX PLL for pixelclock 65.178001
107	DAC2: PIX PLL frequency should be locked now...
108	DAC: Setting screen mode 4 brightness 1.000000
109	DAC: setting palette
110	DAC: PAL pixrdmsk readback $ff
111	DAC2: Setting screen mode 4 brightness 1.000000
112	DAC2: setting palette
113	DAC2: PAL pixrdmsk readback $ff
114	CRTC: setting card pitch (offset between lines)
115	CRTC: offset register set to: $0200
116	CRTC2: setting card pitch (offset between lines)
117	CRTC2: offset register set to: $0200
118	CRTC: setting card RAM to be displayed bpp 32
119	CRTC: startadd: $00000800
120	CRTC: frameRAM: $a0000000
121	CRTC: framebuffer: $a0000800
122	CRTC2: setting card RAM to be displayed bpp 32
123	CRTC2: startadd: $00000800
124	CRTC2: frameRAM: $a0000000
125	CRTC2: framebuffer: $a0000800
126	CRTC: setting timing
127	CRTC: Setting full timing...
128	CRTC:
129	HTOT:a3
130	HDISPEND:7f
131	HBLNKS:7f
132	HBLNKE:a7
133	HSYNCS:83
134	HSYNCE:94
135	VTOT:324
136	VDISPEND:2ff
137	VBLNKS:2ff
138	VBLNKE:325
139	VSYNCS:303
140	VSYNCE:309
141	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
142	CRTC2: setting timing
143	CRTC2: Setting full timing...
144	CRTC2:
145	HTOT:a3
146	HDISPEND:7f
147	HBLNKS:7f
148	HBLNKE:a7
149	HSYNCS:83
150	HSYNCE:94
151	VTOT:324
152	VDISPEND:2ff
153	VBLNKS:2ff
154	VBLNKE:325
155	VSYNCS:303
156	VSYNCE:309
157	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
158	ACC_DMA: timer numerator $000014c8, denominator $00000271
159	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
160	SET_DPMS_MODE: $00000001
161	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
162	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
163	INIT: RAM access OK.
164	SETMODE: booted since 287010.189000 mS
165	Haiku: tunnel access target=usepanel, command=set, value=0
166	Haiku: tunnel access target=tvstandard, command=set, value=0
167	SETMODE: (ENTER) initial modeflags: $0000015f
168	SETMODE: requested target pixelclock 30482kHz
169	SETMODE: requested virtual_width 640, virtual_height 480
170	PROPOSEMODE: (ENTER) requested virtual_width 640, virtual_height 480
171	INIT: memory pitch will be set to 640 pixels for colorspace 0x00000008
172	DAC: NV4/NV10/NV20 restrictions apply
173	DAC: pix VCO frequency found 242.857147Mhz
174	DAC: pix PLL check: requested 30.482000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03
175	PROPOSEMODE: validated virtual_width 640, virtual_height 480 pixels
176	PROPOSEMODE: initial modeflags: $0000015f
177	PROPOSEMODE: validated modeflags: $0000015f
178	PROPOSEMODE: completed successfully.
179	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
180	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
181	INIT: memory pitch will be set to 640 pixels for colorspace 0x00000008
182	SETMODE: setting DUALHEAD mode
183	INIT: switching CRTC/DAC use to be straight-through
184	SETMODE: target clock 30357kHz
185	DAC: NV4/NV10/NV20 restrictions apply
186	DAC: pix VCO frequency found 242.857147Mhz
187	DAC: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03
188	DAC: dumping current pixelPLL settings:
189	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
190	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
191	DAC: phase discriminator frequency is 1.785714Mhz
192	DAC: VCO frequency is 521.428589Mhz
193	DAC: pixelclock is 65.178574Mhz
194	DAC: end of dump.
195	DAC: current NV30_PLLSETUP settings: $00000000
196	DAC: current (0x0000c040) settings: $340bc003
197	DAC: Setting PIX PLL for pixelclock 30.357000
198	DAC: PIX PLL frequency should be locked now...
199	SETMODE: target2 clock 30357kHz
200	DAC2: NV10/NV20 restrictions apply
201	DAC2: pix VCO frequency found 242.857147Mhz
202	DAC2: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03
203	DAC2: dumping current pixelPLL settings:
204	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
205	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
206	DAC2: phase discriminator frequency is 1.785714Mhz
207	DAC2: VCO frequency is 521.428589Mhz
208	DAC2: pixelclock is 65.178574Mhz
209	DAC2: end of dump.
210	DAC2: current NV30_PLLSETUP settings: $00000000
211	DAC2: current (0x0000c040) settings: $340bc003
212	DAC2: Setting PIX PLL for pixelclock 30.357000
213	DAC2: PIX PLL frequency should be locked now...
214	DAC: Setting screen mode 4 brightness 1.000000
215	DAC: setting palette
216	DAC: PAL pixrdmsk readback $ff
217	DAC2: Setting screen mode 4 brightness 1.000000
218	DAC2: setting palette
219	DAC2: PAL pixrdmsk readback $ff
220	CRTC: setting card pitch (offset between lines)
221	CRTC: offset register set to: $0140
222	CRTC2: setting card pitch (offset between lines)
223	CRTC2: offset register set to: $0140
224	CRTC: setting card RAM to be displayed bpp 32
225	CRTC: startadd: $00000800
226	CRTC: frameRAM: $a0000000
227	CRTC: framebuffer: $a0000800
228	CRTC2: setting card RAM to be displayed bpp 32
229	CRTC2: startadd: $00000800
230	CRTC2: frameRAM: $a0000000
231	CRTC2: framebuffer: $a0000800
232	CRTC: setting timing
233	CRTC: Setting full timing...
234	CRTC:
235	HTOT:67
236	HDISPEND:4f
237	HBLNKS:4f
238	HBLNKE:6b
239	HSYNCS:54
240	HSYNCE:60
241	VTOT:24a
242	VDISPEND:1df
243	VBLNKS:1df
244	VBLNKE:24b
245	VSYNCS:205
246	VSYNCE:20b
247	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
248	CRTC2: setting timing
249	CRTC2: Setting full timing...
250	CRTC2:
251	HTOT:67
252	HDISPEND:4f
253	HBLNKS:4f
254	HBLNKE:6b
255	HSYNCS:54
256	HSYNCE:60
257	VTOT:24a
258	VDISPEND:1df
259	VBLNKS:1df
260	VBLNKE:24b
261	VSYNCS:205
262	VSYNCE:20b
263	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
264	ACC_DMA: timer numerator $000014c8, denominator $00000271
265	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
266	SET_DPMS_MODE: $00000001
267	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
268	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
269	INIT: RAM access OK.
270	SETMODE: booted since 287036.398000 mS
271	Overlay: Not exporting hook B_OVERLAY_COUNT.
272	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
273	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
274	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
275	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
276	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
277	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
278	Overlay: Not exporting hook B_RELEASE_OVERLAY.
279	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
280	GET_EDID_INFO: EDID info not available
281	GET_EDID_INFO: EDID info not available
282	GET_EDID_INFO: EDID info not available
283	GET_EDID_INFO: EDID info not available
284	Haiku: tunnel access target=swap, command=get, value=0
285	Haiku: tunnel access target=usepanel, command=get, value=0
286	Haiku: tunnel access target=tvstandard, command=get, value=0
287	Haiku: tunnel access target=swap, command=set, value=0
288	SETMODE: (ENTER) initial modeflags: $0000015f
289	SETMODE: requested target pixelclock 30357kHz
290	SETMODE: requested virtual_width 640, virtual_height 480
291	PROPOSEMODE: (ENTER) requested virtual_width 640, virtual_height 480
292	INIT: memory pitch will be set to 640 pixels for colorspace 0x00000008
293	DAC: NV4/NV10/NV20 restrictions apply
294	DAC: pix VCO frequency found 242.857147Mhz
295	DAC: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03
296	PROPOSEMODE: validated virtual_width 640, virtual_height 480 pixels
297	PROPOSEMODE: initial modeflags: $0000015f
298	PROPOSEMODE: validated modeflags: $0000015f
299	PROPOSEMODE: completed successfully.
300	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
301	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
302	INIT: memory pitch will be set to 640 pixels for colorspace 0x00000008
303	SETMODE: setting DUALHEAD mode
304	INIT: switching CRTC/DAC use to be straight-through
305	SETMODE: target clock 30357kHz
306	DAC: NV4/NV10/NV20 restrictions apply
307	DAC: pix VCO frequency found 242.857147Mhz
308	DAC: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03
309	DAC: dumping current pixelPLL settings:
310	DAC: divider1 settings ($0003220e): M1=14, N1=34, P1=8
311	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
312	DAC: phase discriminator frequency is 1.785714Mhz
313	DAC: VCO frequency is 242.857147Mhz
314	DAC: pixelclock is 30.357143Mhz
315	DAC: end of dump.
316	DAC: current NV30_PLLSETUP settings: $00000000
317	DAC: current (0x0000c040) settings: $340bc003
318	DAC: Setting PIX PLL for pixelclock 30.357000
319	DAC: PIX PLL frequency should be locked now...
320	SETMODE: target2 clock 30357kHz
321	DAC2: NV10/NV20 restrictions apply
322	DAC2: pix VCO frequency found 242.857147Mhz
323	DAC2: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03
324	DAC2: dumping current pixelPLL settings:
325	DAC2: divider1 settings ($0003220e): M1=14, N1=34, P1=8
326	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
327	DAC2: phase discriminator frequency is 1.785714Mhz
328	DAC2: VCO frequency is 242.857147Mhz
329	DAC2: pixelclock is 30.357143Mhz
330	DAC2: end of dump.
331	DAC2: current NV30_PLLSETUP settings: $00000000
332	DAC2: current (0x0000c040) settings: $340bc003
333	DAC2: Setting PIX PLL for pixelclock 30.357000
334	DAC2: PIX PLL frequency should be locked now...
335	DAC: Setting screen mode 4 brightness 1.000000
336	DAC: setting palette
337	DAC: PAL pixrdmsk readback $ff
338	DAC2: Setting screen mode 4 brightness 1.000000
339	DAC2: setting palette
340	DAC2: PAL pixrdmsk readback $ff
341	CRTC: setting card pitch (offset between lines)
342	CRTC: offset register set to: $0140
343	CRTC2: setting card pitch (offset between lines)
344	CRTC2: offset register set to: $0140
345	CRTC: setting card RAM to be displayed bpp 32
346	CRTC: startadd: $00000800
347	CRTC: frameRAM: $a0000000
348	CRTC: framebuffer: $a0000800
349	CRTC2: setting card RAM to be displayed bpp 32
350	CRTC2: startadd: $00000800
351	CRTC2: frameRAM: $a0000000
352	CRTC2: framebuffer: $a0000800
353	CRTC: setting timing
354	CRTC: Setting full timing...
355	CRTC:
356	HTOT:67
357	HDISPEND:4f
358	HBLNKS:4f
359	HBLNKE:6b
360	HSYNCS:54
361	HSYNCE:60
362	VTOT:24a
363	VDISPEND:1df
364	VBLNKS:1df
365	VBLNKE:24b
366	VSYNCS:205
367	VSYNCE:20b
368	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
369	CRTC2: setting timing
370	CRTC2: Setting full timing...
371	CRTC2:
372	HTOT:67
373	HDISPEND:4f
374	HBLNKS:4f
375	HBLNKE:6b
376	HSYNCS:54
377	HSYNCE:60
378	VTOT:24a
379	VDISPEND:1df
380	VBLNKS:1df
381	VBLNKE:24b
382	VSYNCS:205
383	VSYNCE:20b
384	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
385	ACC_DMA: timer numerator $000014c8, denominator $00000271
386	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
387	SET_DPMS_MODE: $00000001
388	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
389	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
390	INIT: RAM access OK.
391	SETMODE: booted since 291449.282000 mS
392	Haiku: tunnel access target=usepanel, command=set, value=0
393	Haiku: tunnel access target=tvstandard, command=set, value=0
394	SETMODE: (ENTER) initial modeflags: $0000015f
395	SETMODE: requested target pixelclock 64996kHz
396	SETMODE: requested virtual_width 1024, virtual_height 768
397	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
398	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
399	DAC: NV4/NV10/NV20 restrictions apply
400	DAC: pix VCO frequency found 521.428589Mhz
401	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
402	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
403	PROPOSEMODE: initial modeflags: $0000015f
404	PROPOSEMODE: validated modeflags: $0000015f
405	PROPOSEMODE: completed successfully.
406	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
407	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
408	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
409	SETMODE: setting DUALHEAD mode
410	INIT: switching CRTC/DAC use to be straight-through
411	SETMODE: target clock 65178kHz
412	DAC: NV4/NV10/NV20 restrictions apply
413	DAC: pix VCO frequency found 521.428589Mhz
414	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
415	DAC: dumping current pixelPLL settings:
416	DAC: divider1 settings ($0003220e): M1=14, N1=34, P1=8
417	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
418	DAC: phase discriminator frequency is 1.785714Mhz
419	DAC: VCO frequency is 242.857147Mhz
420	DAC: pixelclock is 30.357143Mhz
421	DAC: end of dump.
422	DAC: current NV30_PLLSETUP settings: $00000000
423	DAC: current (0x0000c040) settings: $340bc003
424	DAC: Setting PIX PLL for pixelclock 65.178001
425	DAC: PIX PLL frequency should be locked now...
426	SETMODE: target2 clock 65178kHz
427	DAC2: NV10/NV20 restrictions apply
428	DAC2: pix VCO frequency found 521.428589Mhz
429	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
430	DAC2: dumping current pixelPLL settings:
431	DAC2: divider1 settings ($0003220e): M1=14, N1=34, P1=8
432	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
433	DAC2: phase discriminator frequency is 1.785714Mhz
434	DAC2: VCO frequency is 242.857147Mhz
435	DAC2: pixelclock is 30.357143Mhz
436	DAC2: end of dump.
437	DAC2: current NV30_PLLSETUP settings: $00000000
438	DAC2: current (0x0000c040) settings: $340bc003
439	DAC2: Setting PIX PLL for pixelclock 65.178001
440	DAC2: PIX PLL frequency should be locked now...
441	DAC: Setting screen mode 4 brightness 1.000000
442	DAC: setting palette
443	DAC: PAL pixrdmsk readback $ff
444	DAC2: Setting screen mode 4 brightness 1.000000
445	DAC2: setting palette
446	DAC2: PAL pixrdmsk readback $ff
447	CRTC: setting card pitch (offset between lines)
448	CRTC: offset register set to: $0200
449	CRTC2: setting card pitch (offset between lines)
450	CRTC2: offset register set to: $0200
451	CRTC: setting card RAM to be displayed bpp 32
452	CRTC: startadd: $00000800
453	CRTC: frameRAM: $a0000000
454	CRTC: framebuffer: $a0000800
455	CRTC2: setting card RAM to be displayed bpp 32
456	CRTC2: startadd: $00000800
457	CRTC2: frameRAM: $a0000000
458	CRTC2: framebuffer: $a0000800
459	CRTC: setting timing
460	CRTC: Setting full timing...
461	CRTC:
462	HTOT:a3
463	HDISPEND:7f
464	HBLNKS:7f
465	HBLNKE:a7
466	HSYNCS:83
467	HSYNCE:94
468	VTOT:324
469	VDISPEND:2ff
470	VBLNKS:2ff
471	VBLNKE:325
472	VSYNCS:303
473	VSYNCE:309
474	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
475	CRTC2: setting timing
476	CRTC2: Setting full timing...
477	CRTC2:
478	HTOT:a3
479	HDISPEND:7f
480	HBLNKS:7f
481	HBLNKE:a7
482	HSYNCS:83
483	HSYNCE:94
484	VTOT:324
485	VDISPEND:2ff
486	VBLNKS:2ff
487	VBLNKE:325
488	VSYNCS:303
489	VSYNCE:309
490	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
491	ACC_DMA: timer numerator $000014c8, denominator $00000271
492	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
493	SET_DPMS_MODE: $00000001
494	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
495	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
496	INIT: RAM access OK.
497	SETMODE: booted since 291469.316000 mS
498	Overlay: Not exporting hook B_OVERLAY_COUNT.
499	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
500	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
501	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
502	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
503	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
504	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
505	Overlay: Not exporting hook B_RELEASE_OVERLAY.
506	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
507	GET_EDID_INFO: EDID info not available
508	Haiku: tunnel access target=swap, command=get, value=0
509	Haiku: tunnel access target=usepanel, command=get, value=0
510	Haiku: tunnel access target=tvstandard, command=get, value=0
511	GET_EDID_INFO: EDID info not available
512	Haiku: tunnel access target=swap, command=get, value=0
513	Haiku: tunnel access target=usepanel, command=get, value=0
514	Haiku: tunnel access target=tvstandard, command=get, value=0
515	GET_EDID_INFO: EDID info not available
516	Haiku: tunnel access target=swap, command=get, value=0
517	Haiku: tunnel access target=usepanel, command=get, value=0
518	Haiku: tunnel access target=tvstandard, command=get, value=0
519	GET_EDID_INFO: EDID info not available
520	Haiku: tunnel access target=swap, command=get, value=0
521	Haiku: tunnel access target=usepanel, command=get, value=0
522	Haiku: tunnel access target=tvstandard, command=get, value=0
523	GET_EDID_INFO: EDID info not available
524	GET_ACCELERANT_DEVICE_INFO: returning info
525	Haiku: tunnel access target=swap, command=get, value=0
526	Haiku: tunnel access target=usepanel, command=get, value=0
527	Haiku: tunnel access target=tvstandard, command=get, value=0
528	Haiku: tunnel access target=swap, command=get, value=0
529	Haiku: tunnel access target=usepanel, command=get, value=0
530	Haiku: tunnel access target=tvstandard, command=get, value=0
531	GET_EDID_INFO: EDID info not available
532	GET_EDID_INFO: EDID info not available
533	Haiku: tunnel access target=swap, command=get, value=0
534	Haiku: tunnel access target=usepanel, command=get, value=0
535	Haiku: tunnel access target=tvstandard, command=get, value=0
536	Haiku: tunnel access target=swap, command=get, value=0
537	Haiku: tunnel access target=usepanel, command=get, value=0
538	Haiku: tunnel access target=tvstandard, command=get, value=0
539	Haiku: tunnel access target=swap, command=get, value=0
540	Haiku: tunnel access target=usepanel, command=get, value=0
541	Haiku: tunnel access target=tvstandard, command=get, value=0
542	Haiku: tunnel access target=swap, command=get, value=0
543	Haiku: tunnel access target=usepanel, command=get, value=0
544	Haiku: tunnel access target=tvstandard, command=get, value=0
545	Haiku: tunnel access target=swap, command=set, value=0
546	SETMODE: (ENTER) initial modeflags: $0000015f
547	SETMODE: requested target pixelclock 65178kHz
548	SETMODE: requested virtual_width 1024, virtual_height 768
549	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
550	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
551	DAC: NV4/NV10/NV20 restrictions apply
552	DAC: pix VCO frequency found 521.428589Mhz
553	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
554	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
555	PROPOSEMODE: initial modeflags: $0000015f
556	PROPOSEMODE: validated modeflags: $0000015f
557	PROPOSEMODE: completed successfully.
558	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
559	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
560	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
561	SETMODE: setting DUALHEAD mode
562	INIT: switching CRTC/DAC use to be straight-through
563	SETMODE: target clock 65178kHz
564	DAC: NV4/NV10/NV20 restrictions apply
565	DAC: pix VCO frequency found 521.428589Mhz
566	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
567	DAC: dumping current pixelPLL settings:
568	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
569	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
570	DAC: phase discriminator frequency is 1.785714Mhz
571	DAC: VCO frequency is 521.428589Mhz
572	DAC: pixelclock is 65.178574Mhz
573	DAC: end of dump.
574	DAC: current NV30_PLLSETUP settings: $00000000
575	DAC: current (0x0000c040) settings: $340bc003
576	DAC: Setting PIX PLL for pixelclock 65.178001
577	DAC: PIX PLL frequency should be locked now...
578	SETMODE: target2 clock 65178kHz
579	DAC2: NV10/NV20 restrictions apply
580	DAC2: pix VCO frequency found 521.428589Mhz
581	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
582	DAC2: dumping current pixelPLL settings:
583	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
584	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
585	DAC2: phase discriminator frequency is 1.785714Mhz
586	DAC2: VCO frequency is 521.428589Mhz
587	DAC2: pixelclock is 65.178574Mhz
588	DAC2: end of dump.
589	DAC2: current NV30_PLLSETUP settings: $00000000
590	DAC2: current (0x0000c040) settings: $340bc003
591	DAC2: Setting PIX PLL for pixelclock 65.178001
592	DAC2: PIX PLL frequency should be locked now...
593	DAC: Setting screen mode 4 brightness 1.000000
594	DAC: setting palette
595	DAC: PAL pixrdmsk readback $ff
596	DAC2: Setting screen mode 4 brightness 1.000000
597	DAC2: setting palette
598	DAC2: PAL pixrdmsk readback $ff
599	CRTC: setting card pitch (offset between lines)
600	CRTC: offset register set to: $0200
601	CRTC2: setting card pitch (offset between lines)
602	CRTC2: offset register set to: $0200
603	CRTC: setting card RAM to be displayed bpp 32
604	CRTC: startadd: $00000800
605	CRTC: frameRAM: $a0000000
606	CRTC: framebuffer: $a0000800
607	CRTC2: setting card RAM to be displayed bpp 32
608	CRTC2: startadd: $00000800
609	CRTC2: frameRAM: $a0000000
610	CRTC2: framebuffer: $a0000800
611	CRTC: setting timing
612	CRTC: Setting full timing...
613	CRTC:
614	HTOT:a3
615	HDISPEND:7f
616	HBLNKS:7f
617	HBLNKE:a7
618	HSYNCS:83
619	HSYNCE:94
620	VTOT:324
621	VDISPEND:2ff
622	VBLNKS:2ff
623	VBLNKE:325
624	VSYNCS:303
625	VSYNCE:309
626	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
627	CRTC2: setting timing
628	CRTC2: Setting full timing...
629	CRTC2:
630	HTOT:a3
631	HDISPEND:7f
632	HBLNKS:7f
633	HBLNKE:a7
634	HSYNCS:83
635	HSYNCE:94
636	VTOT:324
637	VDISPEND:2ff
638	VBLNKS:2ff
639	VBLNKE:325
640	VSYNCS:303
641	VSYNCE:309
642	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
643	ACC_DMA: timer numerator $000014c8, denominator $00000271
644	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
645	SET_DPMS_MODE: $00000001
646	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
647	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
648	INIT: RAM access OK.
649	SETMODE: booted since 298189.264000 mS
650	Haiku: tunnel access target=usepanel, command=set, value=0
651	Haiku: tunnel access target=tvstandard, command=set, value=0
652	SETMODE: (ENTER) initial modeflags: $0000015f
653	SETMODE: requested target pixelclock 38215kHz
654	SETMODE: requested virtual_width 800, virtual_height 600
655	PROPOSEMODE: (ENTER) requested virtual_width 800, virtual_height 600
656	INIT: memory pitch will be set to 800 pixels for colorspace 0x00000008
657	DAC: NV4/NV10/NV20 restrictions apply
658	DAC: pix VCO frequency found 307.142853Mhz
659	DAC: pix PLL check: requested 38.215000MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03
660	PROPOSEMODE: validated virtual_width 800, virtual_height 600 pixels
661	PROPOSEMODE: initial modeflags: $0000015f
662	PROPOSEMODE: validated modeflags: $0000015f
663	PROPOSEMODE: completed successfully.
664	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
665	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
666	INIT: memory pitch will be set to 800 pixels for colorspace 0x00000008
667	SETMODE: setting DUALHEAD mode
668	INIT: switching CRTC/DAC use to be straight-through
669	SETMODE: target clock 38392kHz
670	DAC: NV4/NV10/NV20 restrictions apply
671	DAC: pix VCO frequency found 307.142853Mhz
672	DAC: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03
673	DAC: dumping current pixelPLL settings:
674	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
675	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
676	DAC: phase discriminator frequency is 1.785714Mhz
677	DAC: VCO frequency is 521.428589Mhz
678	DAC: pixelclock is 65.178574Mhz
679	DAC: end of dump.
680	DAC: current NV30_PLLSETUP settings: $00000000
681	DAC: current (0x0000c040) settings: $340bc003
682	DAC: Setting PIX PLL for pixelclock 38.391998
683	DAC: PIX PLL frequency should be locked now...
684	SETMODE: target2 clock 38392kHz
685	DAC2: NV10/NV20 restrictions apply
686	DAC2: pix VCO frequency found 307.142853Mhz
687	DAC2: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03
688	DAC2: dumping current pixelPLL settings:
689	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
690	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
691	DAC2: phase discriminator frequency is 1.785714Mhz
692	DAC2: VCO frequency is 521.428589Mhz
693	DAC2: pixelclock is 65.178574Mhz
694	DAC2: end of dump.
695	DAC2: current NV30_PLLSETUP settings: $00000000
696	DAC2: current (0x0000c040) settings: $340bc003
697	DAC2: Setting PIX PLL for pixelclock 38.391998
698	DAC2: PIX PLL frequency should be locked now...
699	DAC: Setting screen mode 4 brightness 1.000000
700	DAC: setting palette
701	DAC: PAL pixrdmsk readback $ff
702	DAC2: Setting screen mode 4 brightness 1.000000
703	DAC2: setting palette
704	DAC2: PAL pixrdmsk readback $ff
705	CRTC: setting card pitch (offset between lines)
706	CRTC: offset register set to: $0190
707	CRTC2: setting card pitch (offset between lines)
708	CRTC2: offset register set to: $0190
709	CRTC: setting card RAM to be displayed bpp 32
710	CRTC: startadd: $00000800
711	CRTC: frameRAM: $a0000000
712	CRTC: framebuffer: $a0000800
713	CRTC2: setting card RAM to be displayed bpp 32
714	CRTC2: startadd: $00000800
715	CRTC2: frameRAM: $a0000000
716	CRTC2: framebuffer: $a0000800
717	CRTC: setting timing
718	CRTC: Setting full timing...
719	CRTC:
720	HTOT:7b
721	HDISPEND:63
722	HBLNKS:63
723	HBLNKE:7f
724	HSYNCS:68
725	HSYNCE:72
726	VTOT:26c
727	VDISPEND:257
728	VBLNKS:257
729	VBLNKE:26d
730	VSYNCS:259
731	VSYNCE:25c
732	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
733	CRTC2: setting timing
734	CRTC2: Setting full timing...
735	CRTC2:
736	HTOT:7b
737	HDISPEND:63
738	HBLNKS:63
739	HBLNKE:7f
740	HSYNCS:68
741	HSYNCE:72
742	VTOT:26c
743	VDISPEND:257
744	VBLNKS:257
745	VBLNKE:26d
746	VSYNCS:259
747	VSYNCE:25c
748	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
749	ACC_DMA: timer numerator $000014c8, denominator $00000271
750	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
751	SET_DPMS_MODE: $00000001
752	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
753	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
754	INIT: RAM access OK.
755	SETMODE: booted since 298239.686000 mS
756	Overlay: Not exporting hook B_OVERLAY_COUNT.
757	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
758	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
759	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
760	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
761	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
762	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
763	Overlay: Not exporting hook B_RELEASE_OVERLAY.
764	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
765	GET_EDID_INFO: EDID info not available
766	GET_EDID_INFO: EDID info not available
767	GET_EDID_INFO: EDID info not available
768	GET_EDID_INFO: EDID info not available
769	Haiku: tunnel access target=swap, command=get, value=0
770	Haiku: tunnel access target=usepanel, command=get, value=0
771	Haiku: tunnel access target=tvstandard, command=get, value=0
772	Haiku: tunnel access target=swap, command=set, value=0
773	SETMODE: (ENTER) initial modeflags: $0000015f
774	SETMODE: requested target pixelclock 38392kHz
775	SETMODE: requested virtual_width 800, virtual_height 600
776	PROPOSEMODE: (ENTER) requested virtual_width 800, virtual_height 600
777	INIT: memory pitch will be set to 800 pixels for colorspace 0x00000008
778	DAC: NV4/NV10/NV20 restrictions apply
779	DAC: pix VCO frequency found 307.142853Mhz
780	DAC: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03
781	PROPOSEMODE: validated virtual_width 800, virtual_height 600 pixels
782	PROPOSEMODE: initial modeflags: $0000015f
783	PROPOSEMODE: validated modeflags: $0000015f
784	PROPOSEMODE: completed successfully.
785	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
786	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
787	INIT: memory pitch will be set to 800 pixels for colorspace 0x00000008
788	SETMODE: setting DUALHEAD mode
789	INIT: switching CRTC/DAC use to be straight-through
790	SETMODE: target clock 38392kHz
791	DAC: NV4/NV10/NV20 restrictions apply
792	DAC: pix VCO frequency found 307.142853Mhz
793	DAC: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03
794	DAC: dumping current pixelPLL settings:
795	DAC: divider1 settings ($00032b0e): M1=14, N1=43, P1=8
796	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
797	DAC: phase discriminator frequency is 1.785714Mhz
798	DAC: VCO frequency is 307.142853Mhz
799	DAC: pixelclock is 38.392857Mhz
800	DAC: end of dump.
801	DAC: current NV30_PLLSETUP settings: $00000000
802	DAC: current (0x0000c040) settings: $340bc003
803	DAC: Setting PIX PLL for pixelclock 38.391998
804	DAC: PIX PLL frequency should be locked now...
805	SETMODE: target2 clock 38392kHz
806	DAC2: NV10/NV20 restrictions apply
807	DAC2: pix VCO frequency found 307.142853Mhz
808	DAC2: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03
809	DAC2: dumping current pixelPLL settings:
810	DAC2: divider1 settings ($00032b0e): M1=14, N1=43, P1=8
811	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
812	DAC2: phase discriminator frequency is 1.785714Mhz
813	DAC2: VCO frequency is 307.142853Mhz
814	DAC2: pixelclock is 38.392857Mhz
815	DAC2: end of dump.
816	DAC2: current NV30_PLLSETUP settings: $00000000
817	DAC2: current (0x0000c040) settings: $340bc003
818	DAC2: Setting PIX PLL for pixelclock 38.391998
819	DAC2: PIX PLL frequency should be locked now...
820	DAC: Setting screen mode 4 brightness 1.000000
821	DAC: setting palette
822	DAC: PAL pixrdmsk readback $ff
823	DAC2: Setting screen mode 4 brightness 1.000000
824	DAC2: setting palette
825	DAC2: PAL pixrdmsk readback $ff
826	CRTC: setting card pitch (offset between lines)
827	CRTC: offset register set to: $0190
828	CRTC2: setting card pitch (offset between lines)
829	CRTC2: offset register set to: $0190
830	CRTC: setting card RAM to be displayed bpp 32
831	CRTC: startadd: $00000800
832	CRTC: frameRAM: $a0000000
833	CRTC: framebuffer: $a0000800
834	CRTC2: setting card RAM to be displayed bpp 32
835	CRTC2: startadd: $00000800
836	CRTC2: frameRAM: $a0000000
837	CRTC2: framebuffer: $a0000800
838	CRTC: setting timing
839	CRTC: Setting full timing...
840	CRTC:
841	HTOT:7b
842	HDISPEND:63
843	HBLNKS:63
844	HBLNKE:7f
845	HSYNCS:68
846	HSYNCE:72
847	VTOT:26c
848	VDISPEND:257
849	VBLNKS:257
850	VBLNKE:26d
851	VSYNCS:259
852	VSYNCE:25c
853	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
854	CRTC2: setting timing
855	CRTC2: Setting full timing...
856	CRTC2:
857	HTOT:7b
858	HDISPEND:63
859	HBLNKS:63
860	HBLNKE:7f
861	HSYNCS:68
862	HSYNCE:72
863	VTOT:26c
864	VDISPEND:257
865	VBLNKS:257
866	VBLNKE:26d
867	VSYNCS:259
868	VSYNCE:25c
869	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
870	ACC_DMA: timer numerator $000014c8, denominator $00000271
871	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
872	SET_DPMS_MODE: $00000001
873	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
874	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
875	INIT: RAM access OK.
876	SETMODE: booted since 305888.521000 mS
877	Haiku: tunnel access target=usepanel, command=set, value=0
878	Haiku: tunnel access target=tvstandard, command=set, value=0
879	SETMODE: (ENTER) initial modeflags: $0000015f
880	SETMODE: requested target pixelclock 64996kHz
881	SETMODE: requested virtual_width 1024, virtual_height 768
882	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
883	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
884	DAC: NV4/NV10/NV20 restrictions apply
885	DAC: pix VCO frequency found 521.428589Mhz
886	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
887	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
888	PROPOSEMODE: initial modeflags: $0000015f
889	PROPOSEMODE: validated modeflags: $0000015f
890	PROPOSEMODE: completed successfully.
891	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
892	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
893	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
894	SETMODE: setting DUALHEAD mode
895	INIT: switching CRTC/DAC use to be straight-through
896	SETMODE: target clock 65178kHz
897	DAC: NV4/NV10/NV20 restrictions apply
898	DAC: pix VCO frequency found 521.428589Mhz
899	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
900	DAC: dumping current pixelPLL settings:
901	DAC: divider1 settings ($00032b0e): M1=14, N1=43, P1=8
902	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
903	DAC: phase discriminator frequency is 1.785714Mhz
904	DAC: VCO frequency is 307.142853Mhz
905	DAC: pixelclock is 38.392857Mhz
906	DAC: end of dump.
907	DAC: current NV30_PLLSETUP settings: $00000000
908	DAC: current (0x0000c040) settings: $340bc003
909	DAC: Setting PIX PLL for pixelclock 65.178001
910	DAC: PIX PLL frequency should be locked now...
911	SETMODE: target2 clock 65178kHz
912	DAC2: NV10/NV20 restrictions apply
913	DAC2: pix VCO frequency found 521.428589Mhz
914	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
915	DAC2: dumping current pixelPLL settings:
916	DAC2: divider1 settings ($00032b0e): M1=14, N1=43, P1=8
917	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
918	DAC2: phase discriminator frequency is 1.785714Mhz
919	DAC2: VCO frequency is 307.142853Mhz
920	DAC2: pixelclock is 38.392857Mhz
921	DAC2: end of dump.
922	DAC2: current NV30_PLLSETUP settings: $00000000
923	DAC2: current (0x0000c040) settings: $340bc003
924	DAC2: Setting PIX PLL for pixelclock 65.178001
925	DAC2: PIX PLL frequency should be locked now...
926	DAC: Setting screen mode 4 brightness 1.000000
927	DAC: setting palette
928	DAC: PAL pixrdmsk readback $ff
929	DAC2: Setting screen mode 4 brightness 1.000000
930	DAC2: setting palette
931	DAC2: PAL pixrdmsk readback $ff
932	CRTC: setting card pitch (offset between lines)
933	CRTC: offset register set to: $0200
934	CRTC2: setting card pitch (offset between lines)
935	CRTC2: offset register set to: $0200
936	CRTC: setting card RAM to be displayed bpp 32
937	CRTC: startadd: $00000800
938	CRTC: frameRAM: $a0000000
939	CRTC: framebuffer: $a0000800
940	CRTC2: setting card RAM to be displayed bpp 32
941	CRTC2: startadd: $00000800
942	CRTC2: frameRAM: $a0000000
943	CRTC2: framebuffer: $a0000800
944	CRTC: setting timing
945	CRTC: Setting full timing...
946	CRTC:
947	HTOT:a3
948	HDISPEND:7f
949	HBLNKS:7f
950	HBLNKE:a7
951	HSYNCS:83
952	HSYNCE:94
953	VTOT:324
954	VDISPEND:2ff
955	VBLNKS:2ff
956	VBLNKE:325
957	VSYNCS:303
958	VSYNCE:309
959	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
960	CRTC2: setting timing
961	CRTC2: Setting full timing...
962	CRTC2:
963	HTOT:a3
964	HDISPEND:7f
965	HBLNKS:7f
966	HBLNKE:a7
967	HSYNCS:83
968	HSYNCE:94
969	VTOT:324
970	VDISPEND:2ff
971	VBLNKS:2ff
972	VBLNKE:325
973	VSYNCS:303
974	VSYNCE:309
975	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
976	ACC_DMA: timer numerator $000014c8, denominator $00000271
977	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
978	SET_DPMS_MODE: $00000001
979	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
980	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
981	INIT: RAM access OK.
982	SETMODE: booted since 305911.634000 mS
983	Overlay: Not exporting hook B_OVERLAY_COUNT.
984	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
985	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
986	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
987	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
988	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
989	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
990	Overlay: Not exporting hook B_RELEASE_OVERLAY.
991	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
992	GET_EDID_INFO: EDID info not available
993	Haiku: tunnel access target=swap, command=get, value=0
994	Haiku: tunnel access target=usepanel, command=get, value=0
995	Haiku: tunnel access target=tvstandard, command=get, value=0
996	GET_EDID_INFO: EDID info not available
997	Haiku: tunnel access target=swap, command=get, value=0
998	Haiku: tunnel access target=usepanel, command=get, value=0
999	Haiku: tunnel access target=tvstandard, command=get, value=0
1000	GET_EDID_INFO: EDID info not available
1001	Haiku: tunnel access target=swap, command=get, value=0
1002	Haiku: tunnel access target=usepanel, command=get, value=0
1003	Haiku: tunnel access target=tvstandard, command=get, value=0
1004	GET_EDID_INFO: EDID info not available
1005	Haiku: tunnel access target=swap, command=get, value=0
1006	Haiku: tunnel access target=usepanel, command=get, value=0
1007	Haiku: tunnel access target=tvstandard, command=get, value=0
1008	GET_EDID_INFO: EDID info not available
1009	GET_ACCELERANT_DEVICE_INFO: returning info
1010	Haiku: tunnel access target=swap, command=get, value=0
1011	Haiku: tunnel access target=usepanel, command=get, value=0
1012	Haiku: tunnel access target=tvstandard, command=get, value=0
1013	Haiku: tunnel access target=swap, command=get, value=0
1014	Haiku: tunnel access target=usepanel, command=get, value=0
1015	Haiku: tunnel access target=tvstandard, command=get, value=0
1016	GET_EDID_INFO: EDID info not available
1017	GET_EDID_INFO: EDID info not available
1018	Haiku: tunnel access target=swap, command=get, value=0
1019	Haiku: tunnel access target=usepanel, command=get, value=0
1020	Haiku: tunnel access target=tvstandard, command=get, value=0
1021	Haiku: tunnel access target=swap, command=get, value=0
1022	Haiku: tunnel access target=usepanel, command=get, value=0
1023	Haiku: tunnel access target=tvstandard, command=get, value=0
1024	Haiku: tunnel access target=swap, command=get, value=0
1025	Haiku: tunnel access target=usepanel, command=get, value=0
1026	Haiku: tunnel access target=tvstandard, command=get, value=0
1027	Haiku: tunnel access target=swap, command=get, value=0
1028	Haiku: tunnel access target=usepanel, command=get, value=0
1029	Haiku: tunnel access target=tvstandard, command=get, value=0
1030	Haiku: tunnel access target=swap, command=set, value=0
1031	SETMODE: (ENTER) initial modeflags: $0000015f
1032	SETMODE: requested target pixelclock 65178kHz
1033	SETMODE: requested virtual_width 1024, virtual_height 768
1034	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
1035	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
1036	DAC: NV4/NV10/NV20 restrictions apply
1037	DAC: pix VCO frequency found 521.428589Mhz
1038	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1039	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
1040	PROPOSEMODE: initial modeflags: $0000015f
1041	PROPOSEMODE: validated modeflags: $0000015f
1042	PROPOSEMODE: completed successfully.
1043	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
1044	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
1045	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
1046	SETMODE: setting DUALHEAD mode
1047	INIT: switching CRTC/DAC use to be straight-through
1048	SETMODE: target clock 65178kHz
1049	DAC: NV4/NV10/NV20 restrictions apply
1050	DAC: pix VCO frequency found 521.428589Mhz
1051	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1052	DAC: dumping current pixelPLL settings:
1053	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
1054	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
1055	DAC: phase discriminator frequency is 1.785714Mhz
1056	DAC: VCO frequency is 521.428589Mhz
1057	DAC: pixelclock is 65.178574Mhz
1058	DAC: end of dump.
1059	DAC: current NV30_PLLSETUP settings: $00000000
1060	DAC: current (0x0000c040) settings: $340bc003
1061	DAC: Setting PIX PLL for pixelclock 65.178001
1062	DAC: PIX PLL frequency should be locked now...
1063	SETMODE: target2 clock 65178kHz
1064	DAC2: NV10/NV20 restrictions apply
1065	DAC2: pix VCO frequency found 521.428589Mhz
1066	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1067	DAC2: dumping current pixelPLL settings:
1068	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
1069	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
1070	DAC2: phase discriminator frequency is 1.785714Mhz
1071	DAC2: VCO frequency is 521.428589Mhz
1072	DAC2: pixelclock is 65.178574Mhz
1073	DAC2: end of dump.
1074	DAC2: current NV30_PLLSETUP settings: $00000000
1075	DAC2: current (0x0000c040) settings: $340bc003
1076	DAC2: Setting PIX PLL for pixelclock 65.178001
1077	DAC2: PIX PLL frequency should be locked now...
1078	DAC: Setting screen mode 4 brightness 1.000000
1079	DAC: setting palette
1080	DAC: PAL pixrdmsk readback $ff
1081	DAC2: Setting screen mode 4 brightness 1.000000
1082	DAC2: setting palette
1083	DAC2: PAL pixrdmsk readback $ff
1084	CRTC: setting card pitch (offset between lines)
1085	CRTC: offset register set to: $0200
1086	CRTC2: setting card pitch (offset between lines)
1087	CRTC2: offset register set to: $0200
1088	CRTC: setting card RAM to be displayed bpp 32
1089	CRTC: startadd: $00000800
1090	CRTC: frameRAM: $a0000000
1091	CRTC: framebuffer: $a0000800
1092	CRTC2: setting card RAM to be displayed bpp 32
1093	CRTC2: startadd: $00000800
1094	CRTC2: frameRAM: $a0000000
1095	CRTC2: framebuffer: $a0000800
1096	CRTC: setting timing
1097	CRTC: Setting full timing...
1098	CRTC:
1099	HTOT:a3
1100	HDISPEND:7f
1101	HBLNKS:7f
1102	HBLNKE:a7
1103	HSYNCS:83
1104	HSYNCE:94
1105	VTOT:324
1106	VDISPEND:2ff
1107	VBLNKS:2ff
1108	VBLNKE:325
1109	VSYNCS:303
1110	VSYNCE:309
1111	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
1112	CRTC2: setting timing
1113	CRTC2: Setting full timing...
1114	CRTC2:
1115	HTOT:a3
1116	HDISPEND:7f
1117	HBLNKS:7f
1118	HBLNKE:a7
1119	HSYNCS:83
1120	HSYNCE:94
1121	VTOT:324
1122	VDISPEND:2ff
1123	VBLNKS:2ff
1124	VBLNKE:325
1125	VSYNCS:303
1126	VSYNCE:309
1127	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
1128	ACC_DMA: timer numerator $000014c8, denominator $00000271
1129	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
1130	SET_DPMS_MODE: $00000001
1131	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
1132	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
1133	INIT: RAM access OK.
1134	SETMODE: booted since 358631.008000 mS
1135	Haiku: tunnel access target=usepanel, command=set, value=0
1136	Haiku: tunnel access target=tvstandard, command=set, value=0
1137	SETMODE: (ENTER) initial modeflags: $0000015f
1138	SETMODE: requested target pixelclock 81624kHz
1139	SETMODE: requested virtual_width 1152, virtual_height 864
1140	PROPOSEMODE: (ENTER) requested virtual_width 1152, virtual_height 864
1141	INIT: memory pitch will be set to 1152 pixels for colorspace 0x00000008
1142	DAC: NV4/NV10/NV20 restrictions apply
1143	DAC: pix VCO frequency found 328.571411Mhz
1144	DAC: pix PLL check: requested 81.624001MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02
1145	PROPOSEMODE: validated virtual_width 1152, virtual_height 864 pixels
1146	PROPOSEMODE: initial modeflags: $0000015f
1147	PROPOSEMODE: validated modeflags: $0000015f
1148	PROPOSEMODE: completed successfully.
1149	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
1150	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
1151	INIT: memory pitch will be set to 1152 pixels for colorspace 0x00000008
1152	SETMODE: setting DUALHEAD mode
1153	INIT: switching CRTC/DAC use to be straight-through
1154	SETMODE: target clock 82142kHz
1155	DAC: NV4/NV10/NV20 restrictions apply
1156	DAC: pix VCO frequency found 328.571411Mhz
1157	DAC: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02
1158	DAC: dumping current pixelPLL settings:
1159	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
1160	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
1161	DAC: phase discriminator frequency is 1.785714Mhz
1162	DAC: VCO frequency is 521.428589Mhz
1163	DAC: pixelclock is 65.178574Mhz
1164	DAC: end of dump.
1165	DAC: current NV30_PLLSETUP settings: $00000000
1166	DAC: current (0x0000c040) settings: $340bc003
1167	DAC: Setting PIX PLL for pixelclock 82.141998
1168	DAC: PIX PLL frequency should be locked now...
1169	SETMODE: target2 clock 82142kHz
1170	DAC2: NV10/NV20 restrictions apply
1171	DAC2: pix VCO frequency found 328.571411Mhz
1172	DAC2: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02
1173	DAC2: dumping current pixelPLL settings:
1174	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
1175	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
1176	DAC2: phase discriminator frequency is 1.785714Mhz
1177	DAC2: VCO frequency is 521.428589Mhz
1178	DAC2: pixelclock is 65.178574Mhz
1179	DAC2: end of dump.
1180	DAC2: current NV30_PLLSETUP settings: $00000000
1181	DAC2: current (0x0000c040) settings: $340bc003
1182	DAC2: Setting PIX PLL for pixelclock 82.141998
1183	DAC2: PIX PLL frequency should be locked now...
1184	DAC: Setting screen mode 4 brightness 1.000000
1185	DAC: setting palette
1186	DAC: PAL pixrdmsk readback $ff
1187	DAC2: Setting screen mode 4 brightness 1.000000
1188	DAC2: setting palette
1189	DAC2: PAL pixrdmsk readback $ff
1190	CRTC: setting card pitch (offset between lines)
1191	CRTC: offset register set to: $0240
1192	CRTC2: setting card pitch (offset between lines)
1193	CRTC2: offset register set to: $0240
1194	CRTC: setting card RAM to be displayed bpp 32
1195	CRTC: startadd: $00000800
1196	CRTC: frameRAM: $a0000000
1197	CRTC: framebuffer: $a0000800
1198	CRTC2: setting card RAM to be displayed bpp 32
1199	CRTC2: startadd: $00000800
1200	CRTC2: frameRAM: $a0000000
1201	CRTC2: framebuffer: $a0000800
1202	CRTC: setting timing
1203	CRTC: Setting full timing...
1204	CRTC:
1205	HTOT:b9
1206	HDISPEND:8f
1207	HBLNKS:8f
1208	HBLNKE:bd
1209	HSYNCS:98
1210	HSYNCE:a7
1211	VTOT:37d
1212	VDISPEND:35f
1213	VBLNKS:35f
1214	VBLNKE:37e
1215	VSYNCS:361
1216	VSYNCE:364
1217	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
1218	CRTC2: setting timing
1219	CRTC2: Setting full timing...
1220	CRTC2:
1221	HTOT:b9
1222	HDISPEND:8f
1223	HBLNKS:8f
1224	HBLNKE:bd
1225	HSYNCS:98
1226	HSYNCE:a7
1227	VTOT:37d
1228	VDISPEND:35f
1229	VBLNKS:35f
1230	VBLNKE:37e
1231	VSYNCS:361
1232	VSYNCE:364
1233	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
1234	ACC_DMA: timer numerator $000014c8, denominator $00000271
1235	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
1236	SET_DPMS_MODE: $00000001
1237	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
1238	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
1239	INIT: RAM access OK.
1240	SETMODE: booted since 358658.991000 mS
1241	Overlay: Not exporting hook B_OVERLAY_COUNT.
1242	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
1243	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
1244	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
1245	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
1246	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
1247	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
1248	Overlay: Not exporting hook B_RELEASE_OVERLAY.
1249	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
1250	GET_EDID_INFO: EDID info not available
1251	GET_EDID_INFO: EDID info not available
1252	GET_EDID_INFO: EDID info not available
1253	GET_EDID_INFO: EDID info not available
1254	Haiku: tunnel access target=swap, command=get, value=0
1255	Haiku: tunnel access target=usepanel, command=get, value=0
1256	Haiku: tunnel access target=tvstandard, command=get, value=0
1257	Haiku: tunnel access target=swap, command=set, value=0
1258	SETMODE: (ENTER) initial modeflags: $0000015f
1259	SETMODE: requested target pixelclock 82142kHz
1260	SETMODE: requested virtual_width 1152, virtual_height 864
1261	PROPOSEMODE: (ENTER) requested virtual_width 1152, virtual_height 864
1262	INIT: memory pitch will be set to 1152 pixels for colorspace 0x00000008
1263	DAC: NV4/NV10/NV20 restrictions apply
1264	DAC: pix VCO frequency found 328.571411Mhz
1265	DAC: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02
1266	PROPOSEMODE: validated virtual_width 1152, virtual_height 864 pixels
1267	PROPOSEMODE: initial modeflags: $0000015f
1268	PROPOSEMODE: validated modeflags: $0000015f
1269	PROPOSEMODE: completed successfully.
1270	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
1271	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
1272	INIT: memory pitch will be set to 1152 pixels for colorspace 0x00000008
1273	SETMODE: setting DUALHEAD mode
1274	INIT: switching CRTC/DAC use to be straight-through
1275	SETMODE: target clock 82142kHz
1276	DAC: NV4/NV10/NV20 restrictions apply
1277	DAC: pix VCO frequency found 328.571411Mhz
1278	DAC: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02
1279	DAC: dumping current pixelPLL settings:
1280	DAC: divider1 settings ($00022e0e): M1=14, N1=46, P1=4
1281	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
1282	DAC: phase discriminator frequency is 1.785714Mhz
1283	DAC: VCO frequency is 328.571411Mhz
1284	DAC: pixelclock is 82.142853Mhz
1285	DAC: end of dump.
1286	DAC: current NV30_PLLSETUP settings: $00000000
1287	DAC: current (0x0000c040) settings: $340bc003
1288	DAC: Setting PIX PLL for pixelclock 82.141998
1289	DAC: PIX PLL frequency should be locked now...
1290	SETMODE: target2 clock 82142kHz
1291	DAC2: NV10/NV20 restrictions apply
1292	DAC2: pix VCO frequency found 328.571411Mhz
1293	DAC2: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02
1294	DAC2: dumping current pixelPLL settings:
1295	DAC2: divider1 settings ($00022e0e): M1=14, N1=46, P1=4
1296	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
1297	DAC2: phase discriminator frequency is 1.785714Mhz
1298	DAC2: VCO frequency is 328.571411Mhz
1299	DAC2: pixelclock is 82.142853Mhz
1300	DAC2: end of dump.
1301	DAC2: current NV30_PLLSETUP settings: $00000000
1302	DAC2: current (0x0000c040) settings: $340bc003
1303	DAC2: Setting PIX PLL for pixelclock 82.141998
1304	DAC2: PIX PLL frequency should be locked now...
1305	DAC: Setting screen mode 4 brightness 1.000000
1306	DAC: setting palette
1307	DAC: PAL pixrdmsk readback $ff
1308	DAC2: Setting screen mode 4 brightness 1.000000
1309	DAC2: setting palette
1310	DAC2: PAL pixrdmsk readback $ff
1311	CRTC: setting card pitch (offset between lines)
1312	CRTC: offset register set to: $0240
1313	CRTC2: setting card pitch (offset between lines)
1314	CRTC2: offset register set to: $0240
1315	CRTC: setting card RAM to be displayed bpp 32
1316	CRTC: startadd: $00000800
1317	CRTC: frameRAM: $a0000000
1318	CRTC: framebuffer: $a0000800
1319	CRTC2: setting card RAM to be displayed bpp 32
1320	CRTC2: startadd: $00000800
1321	CRTC2: frameRAM: $a0000000
1322	CRTC2: framebuffer: $a0000800
1323	CRTC: setting timing
1324	CRTC: Setting full timing...
1325	CRTC:
1326	HTOT:b9
1327	HDISPEND:8f
1328	HBLNKS:8f
1329	HBLNKE:bd
1330	HSYNCS:98
1331	HSYNCE:a7
1332	VTOT:37d
1333	VDISPEND:35f
1334	VBLNKS:35f
1335	VBLNKE:37e
1336	VSYNCS:361
1337	VSYNCE:364
1338	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
1339	CRTC2: setting timing
1340	CRTC2: Setting full timing...
1341	CRTC2:
1342	HTOT:b9
1343	HDISPEND:8f
1344	HBLNKS:8f
1345	HBLNKE:bd
1346	HSYNCS:98
1347	HSYNCE:a7
1348	VTOT:37d
1349	VDISPEND:35f
1350	VBLNKS:35f
1351	VBLNKE:37e
1352	VSYNCS:361
1353	VSYNCE:364
1354	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
1355	ACC_DMA: timer numerator $000014c8, denominator $00000271
1356	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
1357	SET_DPMS_MODE: $00000001
1358	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
1359	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
1360	INIT: RAM access OK.
1361	SETMODE: booted since 363461.940000 mS
1362	Haiku: tunnel access target=usepanel, command=set, value=0
1363	Haiku: tunnel access target=tvstandard, command=set, value=0
1364	SETMODE: (ENTER) initial modeflags: $0000015f
1365	SETMODE: requested target pixelclock 64996kHz
1366	SETMODE: requested virtual_width 1024, virtual_height 768
1367	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
1368	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
1369	DAC: NV4/NV10/NV20 restrictions apply
1370	DAC: pix VCO frequency found 521.428589Mhz
1371	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1372	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
1373	PROPOSEMODE: initial modeflags: $0000015f
1374	PROPOSEMODE: validated modeflags: $0000015f
1375	PROPOSEMODE: completed successfully.
1376	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
1377	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
1378	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
1379	SETMODE: setting DUALHEAD mode
1380	INIT: switching CRTC/DAC use to be straight-through
1381	SETMODE: target clock 65178kHz
1382	DAC: NV4/NV10/NV20 restrictions apply
1383	DAC: pix VCO frequency found 521.428589Mhz
1384	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1385	DAC: dumping current pixelPLL settings:
1386	DAC: divider1 settings ($00022e0e): M1=14, N1=46, P1=4
1387	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
1388	DAC: phase discriminator frequency is 1.785714Mhz
1389	DAC: VCO frequency is 328.571411Mhz
1390	DAC: pixelclock is 82.142853Mhz
1391	DAC: end of dump.
1392	DAC: current NV30_PLLSETUP settings: $00000000
1393	DAC: current (0x0000c040) settings: $340bc003
1394	DAC: Setting PIX PLL for pixelclock 65.178001
1395	DAC: PIX PLL frequency should be locked now...
1396	SETMODE: target2 clock 65178kHz
1397	DAC2: NV10/NV20 restrictions apply
1398	DAC2: pix VCO frequency found 521.428589Mhz
1399	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1400	DAC2: dumping current pixelPLL settings:
1401	DAC2: divider1 settings ($00022e0e): M1=14, N1=46, P1=4
1402	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
1403	DAC2: phase discriminator frequency is 1.785714Mhz
1404	DAC2: VCO frequency is 328.571411Mhz
1405	DAC2: pixelclock is 82.142853Mhz
1406	DAC2: end of dump.
1407	DAC2: current NV30_PLLSETUP settings: $00000000
1408	DAC2: current (0x0000c040) settings: $340bc003
1409	DAC2: Setting PIX PLL for pixelclock 65.178001
1410	DAC2: PIX PLL frequency should be locked now...
1411	DAC: Setting screen mode 4 brightness 1.000000
1412	DAC: setting palette
1413	DAC: PAL pixrdmsk readback $ff
1414	DAC2: Setting screen mode 4 brightness 1.000000
1415	DAC2: setting palette
1416	DAC2: PAL pixrdmsk readback $ff
1417	CRTC: setting card pitch (offset between lines)
1418	CRTC: offset register set to: $0200
1419	CRTC2: setting card pitch (offset between lines)
1420	CRTC2: offset register set to: $0200
1421	CRTC: setting card RAM to be displayed bpp 32
1422	CRTC: startadd: $00000800
1423	CRTC: frameRAM: $a0000000
1424	CRTC: framebuffer: $a0000800
1425	CRTC2: setting card RAM to be displayed bpp 32
1426	CRTC2: startadd: $00000800
1427	CRTC2: frameRAM: $a0000000
1428	CRTC2: framebuffer: $a0000800
1429	CRTC: setting timing
1430	CRTC: Setting full timing...
1431	CRTC:
1432	HTOT:a3
1433	HDISPEND:7f
1434	HBLNKS:7f
1435	HBLNKE:a7
1436	HSYNCS:83
1437	HSYNCE:94
1438	VTOT:324
1439	VDISPEND:2ff
1440	VBLNKS:2ff
1441	VBLNKE:325
1442	VSYNCS:303
1443	VSYNCE:309
1444	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
1445	CRTC2: setting timing
1446	CRTC2: Setting full timing...
1447	CRTC2:
1448	HTOT:a3
1449	HDISPEND:7f
1450	HBLNKS:7f
1451	HBLNKE:a7
1452	HSYNCS:83
1453	HSYNCE:94
1454	VTOT:324
1455	VDISPEND:2ff
1456	VBLNKS:2ff
1457	VBLNKE:325
1458	VSYNCS:303
1459	VSYNCE:309
1460	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
1461	ACC_DMA: timer numerator $000014c8, denominator $00000271
1462	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
1463	SET_DPMS_MODE: $00000001
1464	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
1465	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
1466	INIT: RAM access OK.
1467	SETMODE: booted since 363501.405000 mS
1468	Overlay: Not exporting hook B_OVERLAY_COUNT.
1469	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
1470	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
1471	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
1472	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
1473	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
1474	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
1475	Overlay: Not exporting hook B_RELEASE_OVERLAY.
1476	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
1477	GET_EDID_INFO: EDID info not available
1478	Haiku: tunnel access target=swap, command=get, value=0
1479	Haiku: tunnel access target=usepanel, command=get, value=0
1480	Haiku: tunnel access target=tvstandard, command=get, value=0
1481	GET_EDID_INFO: EDID info not available
1482	Haiku: tunnel access target=swap, command=get, value=0
1483	Haiku: tunnel access target=usepanel, command=get, value=0
1484	Haiku: tunnel access target=tvstandard, command=get, value=0
1485	GET_EDID_INFO: EDID info not available
1486	Haiku: tunnel access target=swap, command=get, value=0
1487	Haiku: tunnel access target=usepanel, command=get, value=0
1488	Haiku: tunnel access target=tvstandard, command=get, value=0
1489	GET_EDID_INFO: EDID info not available
1490	Haiku: tunnel access target=swap, command=get, value=0
1491	Haiku: tunnel access target=usepanel, command=get, value=0
1492	Haiku: tunnel access target=tvstandard, command=get, value=0
1493	GET_EDID_INFO: EDID info not available
1494	GET_ACCELERANT_DEVICE_INFO: returning info
1495	Haiku: tunnel access target=swap, command=get, value=0
1496	Haiku: tunnel access target=usepanel, command=get, value=0
1497	Haiku: tunnel access target=tvstandard, command=get, value=0
1498	Haiku: tunnel access target=swap, command=get, value=0
1499	Haiku: tunnel access target=usepanel, command=get, value=0
1500	Haiku: tunnel access target=tvstandard, command=get, value=0
1501	GET_EDID_INFO: EDID info not available
1502	GET_EDID_INFO: EDID info not available
1503	Haiku: tunnel access target=swap, command=get, value=0
1504	Haiku: tunnel access target=usepanel, command=get, value=0
1505	Haiku: tunnel access target=tvstandard, command=get, value=0
1506	Haiku: tunnel access target=swap, command=get, value=0
1507	Haiku: tunnel access target=usepanel, command=get, value=0
1508	Haiku: tunnel access target=tvstandard, command=get, value=0
1509	Haiku: tunnel access target=swap, command=get, value=0
1510	Haiku: tunnel access target=usepanel, command=get, value=0
1511	Haiku: tunnel access target=tvstandard, command=get, value=0
1512	Haiku: tunnel access target=swap, command=get, value=0
1513	Haiku: tunnel access target=usepanel, command=get, value=0
1514	Haiku: tunnel access target=tvstandard, command=get, value=0
1515	Haiku: tunnel access target=swap, command=set, value=0
1516	SETMODE: (ENTER) initial modeflags: $0000015f
1517	SETMODE: requested target pixelclock 65178kHz
1518	SETMODE: requested virtual_width 1024, virtual_height 768
1519	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
1520	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
1521	DAC: NV4/NV10/NV20 restrictions apply
1522	DAC: pix VCO frequency found 521.428589Mhz
1523	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1524	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
1525	PROPOSEMODE: initial modeflags: $0000015f
1526	PROPOSEMODE: validated modeflags: $0000015f
1527	PROPOSEMODE: completed successfully.
1528	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
1529	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
1530	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
1531	SETMODE: setting DUALHEAD mode
1532	INIT: switching CRTC/DAC use to be straight-through
1533	SETMODE: target clock 65178kHz
1534	DAC: NV4/NV10/NV20 restrictions apply
1535	DAC: pix VCO frequency found 521.428589Mhz
1536	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1537	DAC: dumping current pixelPLL settings:
1538	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
1539	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
1540	DAC: phase discriminator frequency is 1.785714Mhz
1541	DAC: VCO frequency is 521.428589Mhz
1542	DAC: pixelclock is 65.178574Mhz
1543	DAC: end of dump.
1544	DAC: current NV30_PLLSETUP settings: $00000000
1545	DAC: current (0x0000c040) settings: $340bc003
1546	DAC: Setting PIX PLL for pixelclock 65.178001
1547	DAC: PIX PLL frequency should be locked now...
1548	SETMODE: target2 clock 65178kHz
1549	DAC2: NV10/NV20 restrictions apply
1550	DAC2: pix VCO frequency found 521.428589Mhz
1551	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1552	DAC2: dumping current pixelPLL settings:
1553	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
1554	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
1555	DAC2: phase discriminator frequency is 1.785714Mhz
1556	DAC2: VCO frequency is 521.428589Mhz
1557	DAC2: pixelclock is 65.178574Mhz
1558	DAC2: end of dump.
1559	DAC2: current NV30_PLLSETUP settings: $00000000
1560	DAC2: current (0x0000c040) settings: $340bc003
1561	DAC2: Setting PIX PLL for pixelclock 65.178001
1562	DAC2: PIX PLL frequency should be locked now...
1563	DAC: Setting screen mode 4 brightness 1.000000
1564	DAC: setting palette
1565	DAC: PAL pixrdmsk readback $ff
1566	DAC2: Setting screen mode 4 brightness 1.000000
1567	DAC2: setting palette
1568	DAC2: PAL pixrdmsk readback $ff
1569	CRTC: setting card pitch (offset between lines)
1570	CRTC: offset register set to: $0200
1571	CRTC2: setting card pitch (offset between lines)
1572	CRTC2: offset register set to: $0200
1573	CRTC: setting card RAM to be displayed bpp 32
1574	CRTC: startadd: $00000800
1575	CRTC: frameRAM: $a0000000
1576	CRTC: framebuffer: $a0000800
1577	CRTC2: setting card RAM to be displayed bpp 32
1578	CRTC2: startadd: $00000800
1579	CRTC2: frameRAM: $a0000000
1580	CRTC2: framebuffer: $a0000800
1581	CRTC: setting timing
1582	CRTC: Setting full timing...
1583	CRTC:
1584	HTOT:a3
1585	HDISPEND:7f
1586	HBLNKS:7f
1587	HBLNKE:a7
1588	HSYNCS:83
1589	HSYNCE:94
1590	VTOT:324
1591	VDISPEND:2ff
1592	VBLNKS:2ff
1593	VBLNKE:325
1594	VSYNCS:303
1595	VSYNCE:309
1596	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
1597	CRTC2: setting timing
1598	CRTC2: Setting full timing...
1599	CRTC2:
1600	HTOT:a3
1601	HDISPEND:7f
1602	HBLNKS:7f
1603	HBLNKE:a7
1604	HSYNCS:83
1605	HSYNCE:94
1606	VTOT:324
1607	VDISPEND:2ff
1608	VBLNKS:2ff
1609	VBLNKE:325
1610	VSYNCS:303
1611	VSYNCE:309
1612	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
1613	ACC_DMA: timer numerator $000014c8, denominator $00000271
1614	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
1615	SET_DPMS_MODE: $00000001
1616	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
1617	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
1618	INIT: RAM access OK.
1619	SETMODE: booted since 372908.550000 mS
1620	Haiku: tunnel access target=usepanel, command=set, value=0
1621	Haiku: tunnel access target=tvstandard, command=set, value=0
1622	SETMODE: (ENTER) initial modeflags: $0000015f
1623	SETMODE: requested target pixelclock 107964kHz
1624	SETMODE: requested virtual_width 1280, virtual_height 1024
1625	PROPOSEMODE: (ENTER) requested virtual_width 1280, virtual_height 1024
1626	INIT: memory pitch will be set to 1280 pixels for colorspace 0x00000008
1627	DAC: NV4/NV10/NV20 restrictions apply
1628	DAC: pix VCO frequency found 430.769226Mhz
1629	DAC: pix PLL check: requested 107.962997MHz got 107.692307MHz, mnp 0x0d 0x38 0x02
1630	PROPOSEMODE: validated virtual_width 1280, virtual_height 1024 pixels
1631	PROPOSEMODE: initial modeflags: $0000015f
1632	PROPOSEMODE: validated modeflags: $0000015f
1633	PROPOSEMODE: completed successfully.
1634	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
1635	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
1636	INIT: memory pitch will be set to 1280 pixels for colorspace 0x00000008
1637	SETMODE: setting DUALHEAD mode
1638	INIT: switching CRTC/DAC use to be straight-through
1639	SETMODE: target clock 107692kHz
1640	DAC: NV4/NV10/NV20 restrictions apply
1641	DAC: pix VCO frequency found 430.769226Mhz
1642	DAC: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02
1643	DAC: dumping current pixelPLL settings:
1644	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
1645	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
1646	DAC: phase discriminator frequency is 1.785714Mhz
1647	DAC: VCO frequency is 521.428589Mhz
1648	DAC: pixelclock is 65.178574Mhz
1649	DAC: end of dump.
1650	DAC: current NV30_PLLSETUP settings: $00000000
1651	DAC: current (0x0000c040) settings: $340bc003
1652	DAC: Setting PIX PLL for pixelclock 107.692001
1653	DAC: PIX PLL frequency should be locked now...
1654	SETMODE: target2 clock 107692kHz
1655	DAC2: NV10/NV20 restrictions apply
1656	DAC2: pix VCO frequency found 430.769226Mhz
1657	DAC2: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02
1658	DAC2: dumping current pixelPLL settings:
1659	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
1660	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
1661	DAC2: phase discriminator frequency is 1.785714Mhz
1662	DAC2: VCO frequency is 521.428589Mhz
1663	DAC2: pixelclock is 65.178574Mhz
1664	DAC2: end of dump.
1665	DAC2: current NV30_PLLSETUP settings: $00000000
1666	DAC2: current (0x0000c040) settings: $340bc003
1667	DAC2: Setting PIX PLL for pixelclock 107.692001
1668	DAC2: PIX PLL frequency should be locked now...
1669	DAC: Setting screen mode 4 brightness 1.000000
1670	DAC: setting palette
1671	DAC: PAL pixrdmsk readback $ff
1672	DAC2: Setting screen mode 4 brightness 1.000000
1673	DAC2: setting palette
1674	DAC2: PAL pixrdmsk readback $ff
1675	CRTC: setting card pitch (offset between lines)
1676	CRTC: offset register set to: $0280
1677	CRTC2: setting card pitch (offset between lines)
1678	CRTC2: offset register set to: $0280
1679	CRTC: setting card RAM to be displayed bpp 32
1680	CRTC: startadd: $00000800
1681	CRTC: frameRAM: $a0000000
1682	CRTC: framebuffer: $a0000800
1683	CRTC2: setting card RAM to be displayed bpp 32
1684	CRTC2: startadd: $00000800
1685	CRTC2: frameRAM: $a0000000
1686	CRTC2: framebuffer: $a0000800
1687	CRTC: setting timing
1688	CRTC: Setting full timing...
1689	CRTC:
1690	HTOT:ce
1691	HDISPEND:9f
1692	HBLNKS:9f
1693	HBLNKE:d2
1694	HSYNCS:a6
1695	HSYNCE:b4
1696	VTOT:428
1697	VDISPEND:3ff
1698	VBLNKS:3ff
1699	VBLNKE:429
1700	VSYNCS:401
1701	VSYNCE:404
1702	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
1703	CRTC2: setting timing
1704	CRTC2: Setting full timing...
1705	CRTC2:
1706	HTOT:ce
1707	HDISPEND:9f
1708	HBLNKS:9f
1709	HBLNKE:d2
1710	HSYNCS:a6
1711	HSYNCE:b4
1712	VTOT:428
1713	VDISPEND:3ff
1714	VBLNKS:3ff
1715	VBLNKE:429
1716	VSYNCS:401
1717	VSYNCE:404
1718	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
1719	ACC_DMA: timer numerator $000014c8, denominator $00000271
1720	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
1721	SET_DPMS_MODE: $00000001
1722	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
1723	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
1724	INIT: RAM access OK.
1725	SETMODE: booted since 372931.934000 mS
1726	Overlay: Not exporting hook B_OVERLAY_COUNT.
1727	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
1728	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
1729	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
1730	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
1731	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
1732	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
1733	Overlay: Not exporting hook B_RELEASE_OVERLAY.
1734	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
1735	GET_EDID_INFO: EDID info not available
1736	GET_EDID_INFO: EDID info not available
1737	GET_EDID_INFO: EDID info not available
1738	GET_EDID_INFO: EDID info not available
1739	Haiku: tunnel access target=swap, command=get, value=0
1740	Haiku: tunnel access target=usepanel, command=get, value=0
1741	Haiku: tunnel access target=tvstandard, command=get, value=0
1742	Haiku: tunnel access target=swap, command=set, value=0
1743	SETMODE: (ENTER) initial modeflags: $0000015f
1744	SETMODE: requested target pixelclock 107692kHz
1745	SETMODE: requested virtual_width 1280, virtual_height 1024
1746	PROPOSEMODE: (ENTER) requested virtual_width 1280, virtual_height 1024
1747	INIT: memory pitch will be set to 1280 pixels for colorspace 0x00000008
1748	DAC: NV4/NV10/NV20 restrictions apply
1749	DAC: pix VCO frequency found 430.769226Mhz
1750	DAC: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02
1751	PROPOSEMODE: validated virtual_width 1280, virtual_height 1024 pixels
1752	PROPOSEMODE: initial modeflags: $0000015f
1753	PROPOSEMODE: validated modeflags: $0000015f
1754	PROPOSEMODE: completed successfully.
1755	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
1756	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
1757	INIT: memory pitch will be set to 1280 pixels for colorspace 0x00000008
1758	SETMODE: setting DUALHEAD mode
1759	INIT: switching CRTC/DAC use to be straight-through
1760	SETMODE: target clock 107692kHz
1761	DAC: NV4/NV10/NV20 restrictions apply
1762	DAC: pix VCO frequency found 430.769226Mhz
1763	DAC: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02
1764	DAC: dumping current pixelPLL settings:
1765	DAC: divider1 settings ($0002380d): M1=13, N1=56, P1=4
1766	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
1767	DAC: phase discriminator frequency is 1.923077Mhz
1768	DAC: VCO frequency is 430.769226Mhz
1769	DAC: pixelclock is 107.692307Mhz
1770	DAC: end of dump.
1771	DAC: current NV30_PLLSETUP settings: $00000000
1772	DAC: current (0x0000c040) settings: $340bc003
1773	DAC: Setting PIX PLL for pixelclock 107.692001
1774	DAC: PIX PLL frequency should be locked now...
1775	SETMODE: target2 clock 107692kHz
1776	DAC2: NV10/NV20 restrictions apply
1777	DAC2: pix VCO frequency found 430.769226Mhz
1778	DAC2: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02
1779	DAC2: dumping current pixelPLL settings:
1780	DAC2: divider1 settings ($0002380d): M1=13, N1=56, P1=4
1781	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
1782	DAC2: phase discriminator frequency is 1.923077Mhz
1783	DAC2: VCO frequency is 430.769226Mhz
1784	DAC2: pixelclock is 107.692307Mhz
1785	DAC2: end of dump.
1786	DAC2: current NV30_PLLSETUP settings: $00000000
1787	DAC2: current (0x0000c040) settings: $340bc003
1788	DAC2: Setting PIX PLL for pixelclock 107.692001
1789	DAC2: PIX PLL frequency should be locked now...
1790	DAC: Setting screen mode 4 brightness 1.000000
1791	DAC: setting palette
1792	DAC: PAL pixrdmsk readback $ff
1793	DAC2: Setting screen mode 4 brightness 1.000000
1794	DAC2: setting palette
1795	DAC2: PAL pixrdmsk readback $ff
1796	CRTC: setting card pitch (offset between lines)
1797	CRTC: offset register set to: $0280
1798	CRTC2: setting card pitch (offset between lines)
1799	CRTC2: offset register set to: $0280
1800	CRTC: setting card RAM to be displayed bpp 32
1801	CRTC: startadd: $00000800
1802	CRTC: frameRAM: $a0000000
1803	CRTC: framebuffer: $a0000800
1804	CRTC2: setting card RAM to be displayed bpp 32
1805	CRTC2: startadd: $00000800
1806	CRTC2: frameRAM: $a0000000
1807	CRTC2: framebuffer: $a0000800
1808	CRTC: setting timing
1809	CRTC: Setting full timing...
1810	CRTC:
1811	HTOT:ce
1812	HDISPEND:9f
1813	HBLNKS:9f
1814	HBLNKE:d2
1815	HSYNCS:a6
1816	HSYNCE:b4
1817	VTOT:428
1818	VDISPEND:3ff
1819	VBLNKS:3ff
1820	VBLNKE:429
1821	VSYNCS:401
1822	VSYNCE:404
1823	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
1824	CRTC2: setting timing
1825	CRTC2: Setting full timing...
1826	CRTC2:
1827	HTOT:ce
1828	HDISPEND:9f
1829	HBLNKS:9f
1830	HBLNKE:d2
1831	HSYNCS:a6
1832	HSYNCE:b4
1833	VTOT:428
1834	VDISPEND:3ff
1835	VBLNKS:3ff
1836	VBLNKE:429
1837	VSYNCS:401
1838	VSYNCE:404
1839	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
1840	ACC_DMA: timer numerator $000014c8, denominator $00000271
1841	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
1842	SET_DPMS_MODE: $00000001
1843	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
1844	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
1845	INIT: RAM access OK.
1846	SETMODE: booted since 378079.028000 mS
1847	Haiku: tunnel access target=usepanel, command=set, value=0
1848	Haiku: tunnel access target=tvstandard, command=set, value=0
1849	SETMODE: (ENTER) initial modeflags: $0000015f
1850	SETMODE: requested target pixelclock 64996kHz
1851	SETMODE: requested virtual_width 1024, virtual_height 768
1852	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
1853	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
1854	DAC: NV4/NV10/NV20 restrictions apply
1855	DAC: pix VCO frequency found 521.428589Mhz
1856	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1857	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
1858	PROPOSEMODE: initial modeflags: $0000015f
1859	PROPOSEMODE: validated modeflags: $0000015f
1860	PROPOSEMODE: completed successfully.
1861	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
1862	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
1863	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
1864	SETMODE: setting DUALHEAD mode
1865	INIT: switching CRTC/DAC use to be straight-through
1866	SETMODE: target clock 65178kHz
1867	DAC: NV4/NV10/NV20 restrictions apply
1868	DAC: pix VCO frequency found 521.428589Mhz
1869	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1870	DAC: dumping current pixelPLL settings:
1871	DAC: divider1 settings ($0002380d): M1=13, N1=56, P1=4
1872	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
1873	DAC: phase discriminator frequency is 1.923077Mhz
1874	DAC: VCO frequency is 430.769226Mhz
1875	DAC: pixelclock is 107.692307Mhz
1876	DAC: end of dump.
1877	DAC: current NV30_PLLSETUP settings: $00000000
1878	DAC: current (0x0000c040) settings: $340bc003
1879	DAC: Setting PIX PLL for pixelclock 65.178001
1880	DAC: PIX PLL frequency should be locked now...
1881	SETMODE: target2 clock 65178kHz
1882	DAC2: NV10/NV20 restrictions apply
1883	DAC2: pix VCO frequency found 521.428589Mhz
1884	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
1885	DAC2: dumping current pixelPLL settings:
1886	DAC2: divider1 settings ($0002380d): M1=13, N1=56, P1=4
1887	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
1888	DAC2: phase discriminator frequency is 1.923077Mhz
1889	DAC2: VCO frequency is 430.769226Mhz
1890	DAC2: pixelclock is 107.692307Mhz
1891	DAC2: end of dump.
1892	DAC2: current NV30_PLLSETUP settings: $00000000
1893	DAC2: current (0x0000c040) settings: $340bc003
1894	DAC2: Setting PIX PLL for pixelclock 65.178001
1895	DAC2: PIX PLL frequency should be locked now...
1896	DAC: Setting screen mode 4 brightness 1.000000
1897	DAC: setting palette
1898	DAC: PAL pixrdmsk readback $ff
1899	DAC2: Setting screen mode 4 brightness 1.000000
1900	DAC2: setting palette
1901	DAC2: PAL pixrdmsk readback $ff
1902	CRTC: setting card pitch (offset between lines)
1903	CRTC: offset register set to: $0200
1904	CRTC2: setting card pitch (offset between lines)
1905	CRTC2: offset register set to: $0200
1906	CRTC: setting card RAM to be displayed bpp 32
1907	CRTC: startadd: $00000800
1908	CRTC: frameRAM: $a0000000
1909	CRTC: framebuffer: $a0000800
1910	CRTC2: setting card RAM to be displayed bpp 32
1911	CRTC2: startadd: $00000800
1912	CRTC2: frameRAM: $a0000000
1913	CRTC2: framebuffer: $a0000800
1914	CRTC: setting timing
1915	CRTC: Setting full timing...
1916	CRTC:
1917	HTOT:a3
1918	HDISPEND:7f
1919	HBLNKS:7f
1920	HBLNKE:a7
1921	HSYNCS:83
1922	HSYNCE:94
1923	VTOT:324
1924	VDISPEND:2ff
1925	VBLNKS:2ff
1926	VBLNKE:325
1927	VSYNCS:303
1928	VSYNCE:309
1929	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
1930	CRTC2: setting timing
1931	CRTC2: Setting full timing...
1932	CRTC2:
1933	HTOT:a3
1934	HDISPEND:7f
1935	HBLNKS:7f
1936	HBLNKE:a7
1937	HSYNCS:83
1938	HSYNCE:94
1939	VTOT:324
1940	VDISPEND:2ff
1941	VBLNKS:2ff
1942	VBLNKE:325
1943	VSYNCS:303
1944	VSYNCE:309
1945	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
1946	ACC_DMA: timer numerator $000014c8, denominator $00000271
1947	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
1948	SET_DPMS_MODE: $00000001
1949	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
1950	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
1951	INIT: RAM access OK.
1952	SETMODE: booted since 378101.148000 mS
1953	Overlay: Not exporting hook B_OVERLAY_COUNT.
1954	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
1955	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
1956	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
1957	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
1958	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
1959	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
1960	Overlay: Not exporting hook B_RELEASE_OVERLAY.
1961	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
1962	GET_EDID_INFO: EDID info not available
1963	Haiku: tunnel access target=swap, command=get, value=0
1964	Haiku: tunnel access target=usepanel, command=get, value=0
1965	Haiku: tunnel access target=tvstandard, command=get, value=0
1966	GET_EDID_INFO: EDID info not available
1967	Haiku: tunnel access target=swap, command=get, value=0
1968	Haiku: tunnel access target=usepanel, command=get, value=0
1969	Haiku: tunnel access target=tvstandard, command=get, value=0
1970	GET_EDID_INFO: EDID info not available
1971	Haiku: tunnel access target=swap, command=get, value=0
1972	Haiku: tunnel access target=usepanel, command=get, value=0
1973	Haiku: tunnel access target=tvstandard, command=get, value=0
1974	GET_EDID_INFO: EDID info not available
1975	Haiku: tunnel access target=swap, command=get, value=0
1976	Haiku: tunnel access target=usepanel, command=get, value=0
1977	Haiku: tunnel access target=tvstandard, command=get, value=0
1978	GET_EDID_INFO: EDID info not available
1979	GET_ACCELERANT_DEVICE_INFO: returning info
1980	Haiku: tunnel access target=swap, command=get, value=0
1981	Haiku: tunnel access target=usepanel, command=get, value=0
1982	Haiku: tunnel access target=tvstandard, command=get, value=0
1983	Haiku: tunnel access target=swap, command=get, value=0
1984	Haiku: tunnel access target=usepanel, command=get, value=0
1985	Haiku: tunnel access target=tvstandard, command=get, value=0
1986	GET_EDID_INFO: EDID info not available
1987	GET_EDID_INFO: EDID info not available
1988	Haiku: tunnel access target=swap, command=get, value=0
1989	Haiku: tunnel access target=usepanel, command=get, value=0
1990	Haiku: tunnel access target=tvstandard, command=get, value=0
1991	Haiku: tunnel access target=swap, command=get, value=0
1992	Haiku: tunnel access target=usepanel, command=get, value=0
1993	Haiku: tunnel access target=tvstandard, command=get, value=0
1994	Haiku: tunnel access target=swap, command=get, value=0
1995	Haiku: tunnel access target=usepanel, command=get, value=0
1996	Haiku: tunnel access target=tvstandard, command=get, value=0
1997	Haiku: tunnel access target=swap, command=get, value=0
1998	Haiku: tunnel access target=usepanel, command=get, value=0
1999	Haiku: tunnel access target=tvstandard, command=get, value=0
2000	Haiku: tunnel access target=swap, command=set, value=0
2001	SETMODE: (ENTER) initial modeflags: $0000015f
2002	SETMODE: requested target pixelclock 65178kHz
2003	SETMODE: requested virtual_width 1024, virtual_height 768
2004	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
2005	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2006	DAC: NV4/NV10/NV20 restrictions apply
2007	DAC: pix VCO frequency found 521.428589Mhz
2008	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2009	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
2010	PROPOSEMODE: initial modeflags: $0000015f
2011	PROPOSEMODE: validated modeflags: $0000015f
2012	PROPOSEMODE: completed successfully.
2013	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2014	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2015	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2016	SETMODE: setting DUALHEAD mode
2017	INIT: switching CRTC/DAC use to be straight-through
2018	SETMODE: target clock 65178kHz
2019	DAC: NV4/NV10/NV20 restrictions apply
2020	DAC: pix VCO frequency found 521.428589Mhz
2021	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2022	DAC: dumping current pixelPLL settings:
2023	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2024	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2025	DAC: phase discriminator frequency is 1.785714Mhz
2026	DAC: VCO frequency is 521.428589Mhz
2027	DAC: pixelclock is 65.178574Mhz
2028	DAC: end of dump.
2029	DAC: current NV30_PLLSETUP settings: $00000000
2030	DAC: current (0x0000c040) settings: $340bc003
2031	DAC: Setting PIX PLL for pixelclock 65.178001
2032	DAC: PIX PLL frequency should be locked now...
2033	SETMODE: target2 clock 65178kHz
2034	DAC2: NV10/NV20 restrictions apply
2035	DAC2: pix VCO frequency found 521.428589Mhz
2036	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2037	DAC2: dumping current pixelPLL settings:
2038	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2039	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
2040	DAC2: phase discriminator frequency is 1.785714Mhz
2041	DAC2: VCO frequency is 521.428589Mhz
2042	DAC2: pixelclock is 65.178574Mhz
2043	DAC2: end of dump.
2044	DAC2: current NV30_PLLSETUP settings: $00000000
2045	DAC2: current (0x0000c040) settings: $340bc003
2046	DAC2: Setting PIX PLL for pixelclock 65.178001
2047	DAC2: PIX PLL frequency should be locked now...
2048	DAC: Setting screen mode 4 brightness 1.000000
2049	DAC: setting palette
2050	DAC: PAL pixrdmsk readback $ff
2051	DAC2: Setting screen mode 4 brightness 1.000000
2052	DAC2: setting palette
2053	DAC2: PAL pixrdmsk readback $ff
2054	CRTC: setting card pitch (offset between lines)
2055	CRTC: offset register set to: $0200
2056	CRTC2: setting card pitch (offset between lines)
2057	CRTC2: offset register set to: $0200
2058	CRTC: setting card RAM to be displayed bpp 32
2059	CRTC: startadd: $00000800
2060	CRTC: frameRAM: $a0000000
2061	CRTC: framebuffer: $a0000800
2062	CRTC2: setting card RAM to be displayed bpp 32
2063	CRTC2: startadd: $00000800
2064	CRTC2: frameRAM: $a0000000
2065	CRTC2: framebuffer: $a0000800
2066	CRTC: setting timing
2067	CRTC: Setting full timing...
2068	CRTC:
2069	HTOT:a3
2070	HDISPEND:7f
2071	HBLNKS:7f
2072	HBLNKE:a7
2073	HSYNCS:83
2074	HSYNCE:94
2075	VTOT:324
2076	VDISPEND:2ff
2077	VBLNKS:2ff
2078	VBLNKE:325
2079	VSYNCS:303
2080	VSYNCE:309
2081	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
2082	CRTC2: setting timing
2083	CRTC2: Setting full timing...
2084	CRTC2:
2085	HTOT:a3
2086	HDISPEND:7f
2087	HBLNKS:7f
2088	HBLNKE:a7
2089	HSYNCS:83
2090	HSYNCE:94
2091	VTOT:324
2092	VDISPEND:2ff
2093	VBLNKS:2ff
2094	VBLNKE:325
2095	VSYNCS:303
2096	VSYNCE:309
2097	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
2098	ACC_DMA: timer numerator $000014c8, denominator $00000271
2099	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
2100	SET_DPMS_MODE: $00000001
2101	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
2102	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
2103	INIT: RAM access OK.
2104	SETMODE: booted since 387475.430000 mS
2105	Haiku: tunnel access target=usepanel, command=set, value=0
2106	Haiku: tunnel access target=tvstandard, command=set, value=0
2107	SETMODE: (ENTER) initial modeflags: $0000015f
2108	SETMODE: requested target pixelclock 122614kHz
2109	SETMODE: requested virtual_width 1400, virtual_height 1050
2110	PROPOSEMODE: (ENTER) requested virtual_width 1400, virtual_height 1050
2111	INIT: memory pitch will be set to 1408 pixels for colorspace 0x00000008
2112	INIT: effective mode slopspace is 8 pixels
2113	DAC: NV4/NV10/NV20 restrictions apply
2114	DAC: pix VCO frequency found 246.153839Mhz
2115	DAC: pix PLL check: requested 122.612999MHz got 123.076920MHz, mnp 0x0d 0x20 0x01
2116	PROPOSEMODE: validated virtual_width 1400, virtual_height 1050 pixels
2117	PROPOSEMODE: initial modeflags: $0000015f
2118	PROPOSEMODE: validated modeflags: $0000015f
2119	PROPOSEMODE: completed successfully.
2120	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2121	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2122	INIT: memory pitch will be set to 1408 pixels for colorspace 0x00000008
2123	INIT: effective mode slopspace is 8 pixels
2124	SETMODE: setting DUALHEAD mode
2125	INIT: switching CRTC/DAC use to be straight-through
2126	SETMODE: target clock 123076kHz
2127	DAC: NV4/NV10/NV20 restrictions apply
2128	DAC: pix VCO frequency found 246.153839Mhz
2129	DAC: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01
2130	DAC: dumping current pixelPLL settings:
2131	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2132	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2133	DAC: phase discriminator frequency is 1.785714Mhz
2134	DAC: VCO frequency is 521.428589Mhz
2135	DAC: pixelclock is 65.178574Mhz
2136	DAC: end of dump.
2137	DAC: current NV30_PLLSETUP settings: $00000000
2138	DAC: current (0x0000c040) settings: $340bc003
2139	DAC: Setting PIX PLL for pixelclock 123.075996
2140	DAC: PIX PLL frequency should be locked now...
2141	SETMODE: target2 clock 123076kHz
2142	DAC2: NV10/NV20 restrictions apply
2143	DAC2: pix VCO frequency found 246.153839Mhz
2144	DAC2: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01
2145	DAC2: dumping current pixelPLL settings:
2146	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2147	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
2148	DAC2: phase discriminator frequency is 1.785714Mhz
2149	DAC2: VCO frequency is 521.428589Mhz
2150	DAC2: pixelclock is 65.178574Mhz
2151	DAC2: end of dump.
2152	DAC2: current NV30_PLLSETUP settings: $00000000
2153	DAC2: current (0x0000c040) settings: $340bc003
2154	DAC2: Setting PIX PLL for pixelclock 123.075996
2155	DAC2: PIX PLL frequency should be locked now...
2156	DAC: Setting screen mode 4 brightness 1.000000
2157	DAC: setting palette
2158	DAC: PAL pixrdmsk readback $ff
2159	DAC2: Setting screen mode 4 brightness 1.000000
2160	DAC2: setting palette
2161	DAC2: PAL pixrdmsk readback $ff
2162	CRTC: setting card pitch (offset between lines)
2163	CRTC: offset register set to: $02c0
2164	CRTC2: setting card pitch (offset between lines)
2165	CRTC2: offset register set to: $02c0
2166	CRTC: setting card RAM to be displayed bpp 32
2167	CRTC: startadd: $00000800
2168	CRTC: frameRAM: $a0000000
2169	CRTC: framebuffer: $a0000800
2170	CRTC2: setting card RAM to be displayed bpp 32
2171	CRTC2: startadd: $00000800
2172	CRTC2: frameRAM: $a0000000
2173	CRTC2: framebuffer: $a0000800
2174	CRTC: setting timing
2175	CRTC: Setting full timing...
2176	CRTC:
2177	HTOT:e6
2178	HDISPEND:ae
2179	HBLNKS:ae
2180	HBLNKE:ea
2181	HSYNCS:ba
2182	HSYNCE:cd
2183	VTOT:43d
2184	VDISPEND:419
2185	VBLNKS:419
2186	VBLNKE:43e
2187	VSYNCS:41b
2188	VSYNCE:41e
2189	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
2190	CRTC2: setting timing
2191	CRTC2: Setting full timing...
2192	CRTC2:
2193	HTOT:e6
2194	HDISPEND:ae
2195	HBLNKS:ae
2196	HBLNKE:ea
2197	HSYNCS:ba
2198	HSYNCE:cd
2199	VTOT:43d
2200	VDISPEND:419
2201	VBLNKS:419
2202	VBLNKE:43e
2203	VSYNCS:41b
2204	VSYNCE:41e
2205	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
2206	ACC_DMA: timer numerator $000014c8, denominator $00000271
2207	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
2208	SET_DPMS_MODE: $00000001
2209	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
2210	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
2211	INIT: RAM access OK.
2212	SETMODE: booted since 387497.505000 mS
2213	Overlay: Not exporting hook B_OVERLAY_COUNT.
2214	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
2215	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
2216	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
2217	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
2218	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
2219	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
2220	Overlay: Not exporting hook B_RELEASE_OVERLAY.
2221	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
2222	GET_EDID_INFO: EDID info not available
2223	GET_EDID_INFO: EDID info not available
2224	GET_EDID_INFO: EDID info not available
2225	GET_EDID_INFO: EDID info not available
2226	Haiku: tunnel access target=swap, command=get, value=0
2227	Haiku: tunnel access target=usepanel, command=get, value=0
2228	Haiku: tunnel access target=tvstandard, command=get, value=0
2229	Haiku: tunnel access target=swap, command=set, value=0
2230	SETMODE: (ENTER) initial modeflags: $0000015f
2231	SETMODE: requested target pixelclock 123076kHz
2232	SETMODE: requested virtual_width 1400, virtual_height 1050
2233	PROPOSEMODE: (ENTER) requested virtual_width 1400, virtual_height 1050
2234	INIT: memory pitch will be set to 1408 pixels for colorspace 0x00000008
2235	INIT: effective mode slopspace is 8 pixels
2236	DAC: NV4/NV10/NV20 restrictions apply
2237	DAC: pix VCO frequency found 246.153839Mhz
2238	DAC: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01
2239	PROPOSEMODE: validated virtual_width 1400, virtual_height 1050 pixels
2240	PROPOSEMODE: initial modeflags: $0000015f
2241	PROPOSEMODE: validated modeflags: $0000015f
2242	PROPOSEMODE: completed successfully.
2243	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2244	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2245	INIT: memory pitch will be set to 1408 pixels for colorspace 0x00000008
2246	INIT: effective mode slopspace is 8 pixels
2247	SETMODE: setting DUALHEAD mode
2248	INIT: switching CRTC/DAC use to be straight-through
2249	SETMODE: target clock 123076kHz
2250	DAC: NV4/NV10/NV20 restrictions apply
2251	DAC: pix VCO frequency found 246.153839Mhz
2252	DAC: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01
2253	DAC: dumping current pixelPLL settings:
2254	DAC: divider1 settings ($0001200d): M1=13, N1=32, P1=2
2255	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2256	DAC: phase discriminator frequency is 1.923077Mhz
2257	DAC: VCO frequency is 246.153839Mhz
2258	DAC: pixelclock is 123.076920Mhz
2259	DAC: end of dump.
2260	DAC: current NV30_PLLSETUP settings: $00000000
2261	DAC: current (0x0000c040) settings: $340bc003
2262	DAC: Setting PIX PLL for pixelclock 123.075996
2263	DAC: PIX PLL frequency should be locked now...
2264	SETMODE: target2 clock 123076kHz
2265	DAC2: NV10/NV20 restrictions apply
2266	DAC2: pix VCO frequency found 246.153839Mhz
2267	DAC2: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01
2268	DAC2: dumping current pixelPLL settings:
2269	DAC2: divider1 settings ($0001200d): M1=13, N1=32, P1=2
2270	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
2271	DAC2: phase discriminator frequency is 1.923077Mhz
2272	DAC2: VCO frequency is 246.153839Mhz
2273	DAC2: pixelclock is 123.076920Mhz
2274	DAC2: end of dump.
2275	DAC2: current NV30_PLLSETUP settings: $00000000
2276	DAC2: current (0x0000c040) settings: $340bc003
2277	DAC2: Setting PIX PLL for pixelclock 123.075996
2278	DAC2: PIX PLL frequency should be locked now...
2279	DAC: Setting screen mode 4 brightness 1.000000
2280	DAC: setting palette
2281	DAC: PAL pixrdmsk readback $ff
2282	DAC2: Setting screen mode 4 brightness 1.000000
2283	DAC2: setting palette
2284	DAC2: PAL pixrdmsk readback $ff
2285	CRTC: setting card pitch (offset between lines)
2286	CRTC: offset register set to: $02c0
2287	CRTC2: setting card pitch (offset between lines)
2288	CRTC2: offset register set to: $02c0
2289	CRTC: setting card RAM to be displayed bpp 32
2290	CRTC: startadd: $00000800
2291	CRTC: frameRAM: $a0000000
2292	CRTC: framebuffer: $a0000800
2293	CRTC2: setting card RAM to be displayed bpp 32
2294	CRTC2: startadd: $00000800
2295	CRTC2: frameRAM: $a0000000
2296	CRTC2: framebuffer: $a0000800
2297	CRTC: setting timing
2298	CRTC: Setting full timing...
2299	CRTC:
2300	HTOT:e6
2301	HDISPEND:ae
2302	HBLNKS:ae
2303	HBLNKE:ea
2304	HSYNCS:ba
2305	HSYNCE:cd
2306	VTOT:43d
2307	VDISPEND:419
2308	VBLNKS:419
2309	VBLNKE:43e
2310	VSYNCS:41b
2311	VSYNCE:41e
2312	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
2313	CRTC2: setting timing
2314	CRTC2: Setting full timing...
2315	CRTC2:
2316	HTOT:e6
2317	HDISPEND:ae
2318	HBLNKS:ae
2319	HBLNKE:ea
2320	HSYNCS:ba
2321	HSYNCE:cd
2322	VTOT:43d
2323	VDISPEND:419
2324	VBLNKS:419
2325	VBLNKE:43e
2326	VSYNCS:41b
2327	VSYNCE:41e
2328	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
2329	ACC_DMA: timer numerator $000014c8, denominator $00000271
2330	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
2331	SET_DPMS_MODE: $00000001
2332	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
2333	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
2334	INIT: RAM access OK.
2335	SETMODE: booted since 391799.867000 mS
2336	Haiku: tunnel access target=usepanel, command=set, value=0
2337	Haiku: tunnel access target=tvstandard, command=set, value=0
2338	SETMODE: (ENTER) initial modeflags: $0000015f
2339	SETMODE: requested target pixelclock 64996kHz
2340	SETMODE: requested virtual_width 1024, virtual_height 768
2341	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
2342	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2343	DAC: NV4/NV10/NV20 restrictions apply
2344	DAC: pix VCO frequency found 521.428589Mhz
2345	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2346	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
2347	PROPOSEMODE: initial modeflags: $0000015f
2348	PROPOSEMODE: validated modeflags: $0000015f
2349	PROPOSEMODE: completed successfully.
2350	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2351	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2352	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2353	SETMODE: setting DUALHEAD mode
2354	INIT: switching CRTC/DAC use to be straight-through
2355	SETMODE: target clock 65178kHz
2356	DAC: NV4/NV10/NV20 restrictions apply
2357	DAC: pix VCO frequency found 521.428589Mhz
2358	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2359	DAC: dumping current pixelPLL settings:
2360	DAC: divider1 settings ($0001200d): M1=13, N1=32, P1=2
2361	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2362	DAC: phase discriminator frequency is 1.923077Mhz
2363	DAC: VCO frequency is 246.153839Mhz
2364	DAC: pixelclock is 123.076920Mhz
2365	DAC: end of dump.
2366	DAC: current NV30_PLLSETUP settings: $00000000
2367	DAC: current (0x0000c040) settings: $340bc003
2368	DAC: Setting PIX PLL for pixelclock 65.178001
2369	DAC: PIX PLL frequency should be locked now...
2370	SETMODE: target2 clock 65178kHz
2371	DAC2: NV10/NV20 restrictions apply
2372	DAC2: pix VCO frequency found 521.428589Mhz
2373	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2374	DAC2: dumping current pixelPLL settings:
2375	DAC2: divider1 settings ($0001200d): M1=13, N1=32, P1=2
2376	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
2377	DAC2: phase discriminator frequency is 1.923077Mhz
2378	DAC2: VCO frequency is 246.153839Mhz
2379	DAC2: pixelclock is 123.076920Mhz
2380	DAC2: end of dump.
2381	DAC2: current NV30_PLLSETUP settings: $00000000
2382	DAC2: current (0x0000c040) settings: $340bc003
2383	DAC2: Setting PIX PLL for pixelclock 65.178001
2384	DAC2: PIX PLL frequency should be locked now...
2385	DAC: Setting screen mode 4 brightness 1.000000
2386	DAC: setting palette
2387	DAC: PAL pixrdmsk readback $ff
2388	DAC2: Setting screen mode 4 brightness 1.000000
2389	DAC2: setting palette
2390	DAC2: PAL pixrdmsk readback $ff
2391	CRTC: setting card pitch (offset between lines)
2392	CRTC: offset register set to: $0200
2393	CRTC2: setting card pitch (offset between lines)
2394	CRTC2: offset register set to: $0200
2395	CRTC: setting card RAM to be displayed bpp 32
2396	CRTC: startadd: $00000800
2397	CRTC: frameRAM: $a0000000
2398	CRTC: framebuffer: $a0000800
2399	CRTC2: setting card RAM to be displayed bpp 32
2400	CRTC2: startadd: $00000800
2401	CRTC2: frameRAM: $a0000000
2402	CRTC2: framebuffer: $a0000800
2403	CRTC: setting timing
2404	CRTC: Setting full timing...
2405	CRTC:
2406	HTOT:a3
2407	HDISPEND:7f
2408	HBLNKS:7f
2409	HBLNKE:a7
2410	HSYNCS:83
2411	HSYNCE:94
2412	VTOT:324
2413	VDISPEND:2ff
2414	VBLNKS:2ff
2415	VBLNKE:325
2416	VSYNCS:303
2417	VSYNCE:309
2418	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
2419	CRTC2: setting timing
2420	CRTC2: Setting full timing...
2421	CRTC2:
2422	HTOT:a3
2423	HDISPEND:7f
2424	HBLNKS:7f
2425	HBLNKE:a7
2426	HSYNCS:83
2427	HSYNCE:94
2428	VTOT:324
2429	VDISPEND:2ff
2430	VBLNKS:2ff
2431	VBLNKE:325
2432	VSYNCS:303
2433	VSYNCE:309
2434	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
2435	ACC_DMA: timer numerator $000014c8, denominator $00000271
2436	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
2437	SET_DPMS_MODE: $00000001
2438	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
2439	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
2440	INIT: RAM access OK.
2441	SETMODE: booted since 391854.368000 mS
2442	Overlay: Not exporting hook B_OVERLAY_COUNT.
2443	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
2444	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
2445	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
2446	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
2447	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
2448	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
2449	Overlay: Not exporting hook B_RELEASE_OVERLAY.
2450	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
2451	GET_EDID_INFO: EDID info not available
2452	Haiku: tunnel access target=swap, command=get, value=0
2453	Haiku: tunnel access target=usepanel, command=get, value=0
2454	Haiku: tunnel access target=tvstandard, command=get, value=0
2455	GET_EDID_INFO: EDID info not available
2456	Haiku: tunnel access target=swap, command=get, value=0
2457	Haiku: tunnel access target=usepanel, command=get, value=0
2458	Haiku: tunnel access target=tvstandard, command=get, value=0
2459	GET_EDID_INFO: EDID info not available
2460	Haiku: tunnel access target=swap, command=get, value=0
2461	Haiku: tunnel access target=usepanel, command=get, value=0
2462	Haiku: tunnel access target=tvstandard, command=get, value=0
2463	GET_EDID_INFO: EDID info not available
2464	Haiku: tunnel access target=swap, command=get, value=0
2465	Haiku: tunnel access target=usepanel, command=get, value=0
2466	Haiku: tunnel access target=tvstandard, command=get, value=0
2467	GET_EDID_INFO: EDID info not available
2468	GET_ACCELERANT_DEVICE_INFO: returning info
2469	Haiku: tunnel access target=swap, command=get, value=0
2470	Haiku: tunnel access target=usepanel, command=get, value=0
2471	Haiku: tunnel access target=tvstandard, command=get, value=0
2472	Haiku: tunnel access target=swap, command=get, value=0
2473	Haiku: tunnel access target=usepanel, command=get, value=0
2474	Haiku: tunnel access target=tvstandard, command=get, value=0
2475	GET_EDID_INFO: EDID info not available
2476	GET_EDID_INFO: EDID info not available
2477	Haiku: tunnel access target=swap, command=get, value=0
2478	Haiku: tunnel access target=usepanel, command=get, value=0
2479	Haiku: tunnel access target=tvstandard, command=get, value=0
2480	Haiku: tunnel access target=swap, command=get, value=0
2481	Haiku: tunnel access target=usepanel, command=get, value=0
2482	Haiku: tunnel access target=tvstandard, command=get, value=0
2483	Haiku: tunnel access target=swap, command=get, value=0
2484	Haiku: tunnel access target=usepanel, command=get, value=0
2485	Haiku: tunnel access target=tvstandard, command=get, value=0
2486	Haiku: tunnel access target=swap, command=get, value=0
2487	Haiku: tunnel access target=usepanel, command=get, value=0
2488	Haiku: tunnel access target=tvstandard, command=get, value=0
2489	Haiku: tunnel access target=swap, command=set, value=0
2490	SETMODE: (ENTER) initial modeflags: $0000015f
2491	SETMODE: requested target pixelclock 65178kHz
2492	SETMODE: requested virtual_width 1024, virtual_height 768
2493	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
2494	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2495	DAC: NV4/NV10/NV20 restrictions apply
2496	DAC: pix VCO frequency found 521.428589Mhz
2497	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2498	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
2499	PROPOSEMODE: initial modeflags: $0000015f
2500	PROPOSEMODE: validated modeflags: $0000015f
2501	PROPOSEMODE: completed successfully.
2502	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2503	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2504	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2505	SETMODE: setting DUALHEAD mode
2506	INIT: switching CRTC/DAC use to be straight-through
2507	SETMODE: target clock 65178kHz
2508	DAC: NV4/NV10/NV20 restrictions apply
2509	DAC: pix VCO frequency found 521.428589Mhz
2510	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2511	DAC: dumping current pixelPLL settings:
2512	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2513	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2514	DAC: phase discriminator frequency is 1.785714Mhz
2515	DAC: VCO frequency is 521.428589Mhz
2516	DAC: pixelclock is 65.178574Mhz
2517	DAC: end of dump.
2518	DAC: current NV30_PLLSETUP settings: $00000000
2519	DAC: current (0x0000c040) settings: $340bc003
2520	DAC: Setting PIX PLL for pixelclock 65.178001
2521	DAC: PIX PLL frequency should be locked now...
2522	SETMODE: target2 clock 65178kHz
2523	DAC2: NV10/NV20 restrictions apply
2524	DAC2: pix VCO frequency found 521.428589Mhz
2525	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2526	DAC2: dumping current pixelPLL settings:
2527	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2528	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
2529	DAC2: phase discriminator frequency is 1.785714Mhz
2530	DAC2: VCO frequency is 521.428589Mhz
2531	DAC2: pixelclock is 65.178574Mhz
2532	DAC2: end of dump.
2533	DAC2: current NV30_PLLSETUP settings: $00000000
2534	DAC2: current (0x0000c040) settings: $340bc003
2535	DAC2: Setting PIX PLL for pixelclock 65.178001
2536	DAC2: PIX PLL frequency should be locked now...
2537	DAC: Setting screen mode 4 brightness 1.000000
2538	DAC: setting palette
2539	DAC: PAL pixrdmsk readback $ff
2540	DAC2: Setting screen mode 4 brightness 1.000000
2541	DAC2: setting palette
2542	DAC2: PAL pixrdmsk readback $ff
2543	CRTC: setting card pitch (offset between lines)
2544	CRTC: offset register set to: $0200
2545	CRTC2: setting card pitch (offset between lines)
2546	CRTC2: offset register set to: $0200
2547	CRTC: setting card RAM to be displayed bpp 32
2548	CRTC: startadd: $00000800
2549	CRTC: frameRAM: $a0000000
2550	CRTC: framebuffer: $a0000800
2551	CRTC2: setting card RAM to be displayed bpp 32
2552	CRTC2: startadd: $00000800
2553	CRTC2: frameRAM: $a0000000
2554	CRTC2: framebuffer: $a0000800
2555	CRTC: setting timing
2556	CRTC: Setting full timing...
2557	CRTC:
2558	HTOT:a3
2559	HDISPEND:7f
2560	HBLNKS:7f
2561	HBLNKE:a7
2562	HSYNCS:83
2563	HSYNCE:94
2564	VTOT:324
2565	VDISPEND:2ff
2566	VBLNKS:2ff
2567	VBLNKE:325
2568	VSYNCS:303
2569	VSYNCE:309
2570	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
2571	CRTC2: setting timing
2572	CRTC2: Setting full timing...
2573	CRTC2:
2574	HTOT:a3
2575	HDISPEND:7f
2576	HBLNKS:7f
2577	HBLNKE:a7
2578	HSYNCS:83
2579	HSYNCE:94
2580	VTOT:324
2581	VDISPEND:2ff
2582	VBLNKS:2ff
2583	VBLNKE:325
2584	VSYNCS:303
2585	VSYNCE:309
2586	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
2587	ACC_DMA: timer numerator $000014c8, denominator $00000271
2588	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
2589	SET_DPMS_MODE: $00000001
2590	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
2591	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
2592	INIT: RAM access OK.
2593	SETMODE: booted since 399084.711000 mS
2594	Haiku: tunnel access target=usepanel, command=set, value=0
2595	Haiku: tunnel access target=tvstandard, command=set, value=0
2596	SETMODE: (ENTER) initial modeflags: $0000015f
2597	SETMODE: requested target pixelclock 162000kHz
2598	SETMODE: requested virtual_width 1600, virtual_height 1200
2599	PROPOSEMODE: (ENTER) requested virtual_width 1600, virtual_height 1200
2600	INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008
2601	DAC: NV4/NV10/NV20 restrictions apply
2602	DAC: pix VCO frequency found 323.076904Mhz
2603	DAC: pix PLL check: requested 162.000000MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
2604	PROPOSEMODE: validated virtual_width 1600, virtual_height 1200 pixels
2605	PROPOSEMODE: initial modeflags: $0000015f
2606	PROPOSEMODE: validated modeflags: $0000015f
2607	PROPOSEMODE: completed successfully.
2608	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2609	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2610	INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008
2611	SETMODE: setting DUALHEAD mode
2612	INIT: switching CRTC/DAC use to be straight-through
2613	SETMODE: target clock 161538kHz
2614	DAC: NV4/NV10/NV20 restrictions apply
2615	DAC: pix VCO frequency found 323.076904Mhz
2616	DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
2617	DAC: dumping current pixelPLL settings:
2618	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2619	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2620	DAC: phase discriminator frequency is 1.785714Mhz
2621	DAC: VCO frequency is 521.428589Mhz
2622	DAC: pixelclock is 65.178574Mhz
2623	DAC: end of dump.
2624	DAC: current NV30_PLLSETUP settings: $00000000
2625	DAC: current (0x0000c040) settings: $340bc003
2626	DAC: Setting PIX PLL for pixelclock 161.537994
2627	DAC: PIX PLL frequency should be locked now...
2628	SETMODE: target2 clock 161538kHz
2629	DAC2: NV10/NV20 restrictions apply
2630	DAC2: pix VCO frequency found 323.076904Mhz
2631	DAC2: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
2632	DAC2: dumping current pixelPLL settings:
2633	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2634	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
2635	DAC2: phase discriminator frequency is 1.785714Mhz
2636	DAC2: VCO frequency is 521.428589Mhz
2637	DAC2: pixelclock is 65.178574Mhz
2638	DAC2: end of dump.
2639	DAC2: current NV30_PLLSETUP settings: $00000000
2640	DAC2: current (0x0000c040) settings: $340bc003
2641	DAC2: Setting PIX PLL for pixelclock 161.537994
2642	DAC2: PIX PLL frequency should be locked now...
2643	DAC: Setting screen mode 4 brightness 1.000000
2644	DAC: setting palette
2645	DAC: PAL pixrdmsk readback $ff
2646	DAC2: Setting screen mode 4 brightness 1.000000
2647	DAC2: setting palette
2648	DAC2: PAL pixrdmsk readback $ff
2649	CRTC: setting card pitch (offset between lines)
2650	CRTC: offset register set to: $0320
2651	CRTC2: setting card pitch (offset between lines)
2652	CRTC2: offset register set to: $0320
2653	CRTC: setting card RAM to be displayed bpp 32
2654	CRTC: startadd: $00000800
2655	CRTC: frameRAM: $a0000000
2656	CRTC: framebuffer: $a0000800
2657	CRTC2: setting card RAM to be displayed bpp 32
2658	CRTC2: startadd: $00000800
2659	CRTC2: frameRAM: $a0000000
2660	CRTC2: framebuffer: $a0000800
2661	CRTC: setting timing
2662	CRTC: Setting full timing...
2663	CRTC:
2664	HTOT:109
2665	HDISPEND:c7
2666	HBLNKS:c7
2667	HBLNKE:10d
2668	HSYNCS:d0
2669	HSYNCE:e8
2670	VTOT:4e0
2671	VDISPEND:4af
2672	VBLNKS:4af
2673	VBLNKE:4e1
2674	VSYNCS:4b1
2675	VSYNCE:4b4
2676	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
2677	CRTC2: setting timing
2678	CRTC2: Setting full timing...
2679	CRTC2:
2680	HTOT:109
2681	HDISPEND:c7
2682	HBLNKS:c7
2683	HBLNKE:10d
2684	HSYNCS:d0
2685	HSYNCE:e8
2686	VTOT:4e0
2687	VDISPEND:4af
2688	VBLNKS:4af
2689	VBLNKE:4e1
2690	VSYNCS:4b1
2691	VSYNCE:4b4
2692	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
2693	ACC_DMA: timer numerator $000014c8, denominator $00000271
2694	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
2695	SET_DPMS_MODE: $00000001
2696	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
2697	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
2698	INIT: RAM access OK.
2699	SETMODE: booted since 399103.345000 mS
2700	Overlay: Not exporting hook B_OVERLAY_COUNT.
2701	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
2702	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
2703	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
2704	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
2705	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
2706	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
2707	Overlay: Not exporting hook B_RELEASE_OVERLAY.
2708	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
2709	GET_EDID_INFO: EDID info not available
2710	GET_EDID_INFO: EDID info not available
2711	GET_EDID_INFO: EDID info not available
2712	GET_EDID_INFO: EDID info not available
2713	Haiku: tunnel access target=swap, command=get, value=0
2714	Haiku: tunnel access target=usepanel, command=get, value=0
2715	Haiku: tunnel access target=tvstandard, command=get, value=0
2716	Haiku: tunnel access target=swap, command=set, value=0
2717	SETMODE: (ENTER) initial modeflags: $0000015f
2718	SETMODE: requested target pixelclock 161538kHz
2719	SETMODE: requested virtual_width 1600, virtual_height 1200
2720	PROPOSEMODE: (ENTER) requested virtual_width 1600, virtual_height 1200
2721	INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008
2722	DAC: NV4/NV10/NV20 restrictions apply
2723	DAC: pix VCO frequency found 323.076904Mhz
2724	DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
2725	PROPOSEMODE: validated virtual_width 1600, virtual_height 1200 pixels
2726	PROPOSEMODE: initial modeflags: $0000015f
2727	PROPOSEMODE: validated modeflags: $0000015f
2728	PROPOSEMODE: completed successfully.
2729	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2730	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2731	INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008
2732	SETMODE: setting DUALHEAD mode
2733	INIT: switching CRTC/DAC use to be straight-through
2734	SETMODE: target clock 161538kHz
2735	DAC: NV4/NV10/NV20 restrictions apply
2736	DAC: pix VCO frequency found 323.076904Mhz
2737	DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
2738	DAC: dumping current pixelPLL settings:
2739	DAC: divider1 settings ($00012a0d): M1=13, N1=42, P1=2
2740	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2741	DAC: phase discriminator frequency is 1.923077Mhz
2742	DAC: VCO frequency is 323.076904Mhz
2743	DAC: pixelclock is 161.538452Mhz
2744	DAC: end of dump.
2745	DAC: current NV30_PLLSETUP settings: $00000000
2746	DAC: current (0x0000c040) settings: $340bc003
2747	DAC: Setting PIX PLL for pixelclock 161.537994
2748	DAC: PIX PLL frequency should be locked now...
2749	SETMODE: target2 clock 161538kHz
2750	DAC2: NV10/NV20 restrictions apply
2751	DAC2: pix VCO frequency found 323.076904Mhz
2752	DAC2: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
2753	DAC2: dumping current pixelPLL settings:
2754	DAC2: divider1 settings ($00012a0d): M1=13, N1=42, P1=2
2755	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
2756	DAC2: phase discriminator frequency is 1.923077Mhz
2757	DAC2: VCO frequency is 323.076904Mhz
2758	DAC2: pixelclock is 161.538452Mhz
2759	DAC2: end of dump.
2760	DAC2: current NV30_PLLSETUP settings: $00000000
2761	DAC2: current (0x0000c040) settings: $340bc003
2762	DAC2: Setting PIX PLL for pixelclock 161.537994
2763	DAC2: PIX PLL frequency should be locked now...
2764	DAC: Setting screen mode 4 brightness 1.000000
2765	DAC: setting palette
2766	DAC: PAL pixrdmsk readback $ff
2767	DAC2: Setting screen mode 4 brightness 1.000000
2768	DAC2: setting palette
2769	DAC2: PAL pixrdmsk readback $ff
2770	CRTC: setting card pitch (offset between lines)
2771	CRTC: offset register set to: $0320
2772	CRTC2: setting card pitch (offset between lines)
2773	CRTC2: offset register set to: $0320
2774	CRTC: setting card RAM to be displayed bpp 32
2775	CRTC: startadd: $00000800
2776	CRTC: frameRAM: $a0000000
2777	CRTC: framebuffer: $a0000800
2778	CRTC2: setting card RAM to be displayed bpp 32
2779	CRTC2: startadd: $00000800
2780	CRTC2: frameRAM: $a0000000
2781	CRTC2: framebuffer: $a0000800
2782	CRTC: setting timing
2783	CRTC: Setting full timing...
2784	CRTC:
2785	HTOT:109
2786	HDISPEND:c7
2787	HBLNKS:c7
2788	HBLNKE:10d
2789	HSYNCS:d0
2790	HSYNCE:e8
2791	VTOT:4e0
2792	VDISPEND:4af
2793	VBLNKS:4af
2794	VBLNKE:4e1
2795	VSYNCS:4b1
2796	VSYNCE:4b4
2797	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
2798	CRTC2: setting timing
2799	CRTC2: Setting full timing...
2800	CRTC2:
2801	HTOT:109
2802	HDISPEND:c7
2803	HBLNKS:c7
2804	HBLNKE:10d
2805	HSYNCS:d0
2806	HSYNCE:e8
2807	VTOT:4e0
2808	VDISPEND:4af
2809	VBLNKS:4af
2810	VBLNKE:4e1
2811	VSYNCS:4b1
2812	VSYNCE:4b4
2813	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
2814	ACC_DMA: timer numerator $000014c8, denominator $00000271
2815	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
2816	SET_DPMS_MODE: $00000001
2817	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
2818	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
2819	INIT: RAM access OK.
2820	SETMODE: booted since 402763.025000 mS
2821	Haiku: tunnel access target=usepanel, command=set, value=0
2822	Haiku: tunnel access target=tvstandard, command=set, value=0
2823	SETMODE: (ENTER) initial modeflags: $0000015f
2824	SETMODE: requested target pixelclock 64996kHz
2825	SETMODE: requested virtual_width 1024, virtual_height 768
2826	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
2827	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2828	DAC: NV4/NV10/NV20 restrictions apply
2829	DAC: pix VCO frequency found 521.428589Mhz
2830	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2831	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
2832	PROPOSEMODE: initial modeflags: $0000015f
2833	PROPOSEMODE: validated modeflags: $0000015f
2834	PROPOSEMODE: completed successfully.
2835	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2836	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2837	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2838	SETMODE: setting DUALHEAD mode
2839	INIT: switching CRTC/DAC use to be straight-through
2840	SETMODE: target clock 65178kHz
2841	DAC: NV4/NV10/NV20 restrictions apply
2842	DAC: pix VCO frequency found 521.428589Mhz
2843	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2844	DAC: dumping current pixelPLL settings:
2845	DAC: divider1 settings ($00012a0d): M1=13, N1=42, P1=2
2846	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2847	DAC: phase discriminator frequency is 1.923077Mhz
2848	DAC: VCO frequency is 323.076904Mhz
2849	DAC: pixelclock is 161.538452Mhz
2850	DAC: end of dump.
2851	DAC: current NV30_PLLSETUP settings: $00000000
2852	DAC: current (0x0000c040) settings: $340bc003
2853	DAC: Setting PIX PLL for pixelclock 65.178001
2854	DAC: PIX PLL frequency should be locked now...
2855	SETMODE: target2 clock 65178kHz
2856	DAC2: NV10/NV20 restrictions apply
2857	DAC2: pix VCO frequency found 521.428589Mhz
2858	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2859	DAC2: dumping current pixelPLL settings:
2860	DAC2: divider1 settings ($00012a0d): M1=13, N1=42, P1=2
2861	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
2862	DAC2: phase discriminator frequency is 1.923077Mhz
2863	DAC2: VCO frequency is 323.076904Mhz
2864	DAC2: pixelclock is 161.538452Mhz
2865	DAC2: end of dump.
2866	DAC2: current NV30_PLLSETUP settings: $00000000
2867	DAC2: current (0x0000c040) settings: $340bc003
2868	DAC2: Setting PIX PLL for pixelclock 65.178001
2869	DAC2: PIX PLL frequency should be locked now...
2870	DAC: Setting screen mode 4 brightness 1.000000
2871	DAC: setting palette
2872	DAC: PAL pixrdmsk readback $ff
2873	DAC2: Setting screen mode 4 brightness 1.000000
2874	DAC2: setting palette
2875	DAC2: PAL pixrdmsk readback $ff
2876	CRTC: setting card pitch (offset between lines)
2877	CRTC: offset register set to: $0200
2878	CRTC2: setting card pitch (offset between lines)
2879	CRTC2: offset register set to: $0200
2880	CRTC: setting card RAM to be displayed bpp 32
2881	CRTC: startadd: $00000800
2882	CRTC: frameRAM: $a0000000
2883	CRTC: framebuffer: $a0000800
2884	CRTC2: setting card RAM to be displayed bpp 32
2885	CRTC2: startadd: $00000800
2886	CRTC2: frameRAM: $a0000000
2887	CRTC2: framebuffer: $a0000800
2888	CRTC: setting timing
2889	CRTC: Setting full timing...
2890	CRTC:
2891	HTOT:a3
2892	HDISPEND:7f
2893	HBLNKS:7f
2894	HBLNKE:a7
2895	HSYNCS:83
2896	HSYNCE:94
2897	VTOT:324
2898	VDISPEND:2ff
2899	VBLNKS:2ff
2900	VBLNKE:325
2901	VSYNCS:303
2902	VSYNCE:309
2903	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
2904	CRTC2: setting timing
2905	CRTC2: Setting full timing...
2906	CRTC2:
2907	HTOT:a3
2908	HDISPEND:7f
2909	HBLNKS:7f
2910	HBLNKE:a7
2911	HSYNCS:83
2912	HSYNCE:94
2913	VTOT:324
2914	VDISPEND:2ff
2915	VBLNKS:2ff
2916	VBLNKE:325
2917	VSYNCS:303
2918	VSYNCE:309
2919	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
2920	ACC_DMA: timer numerator $000014c8, denominator $00000271
2921	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
2922	SET_DPMS_MODE: $00000001
2923	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
2924	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
2925	INIT: RAM access OK.
2926	SETMODE: booted since 402791.236000 mS
2927	Overlay: Not exporting hook B_OVERLAY_COUNT.
2928	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
2929	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
2930	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
2931	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
2932	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
2933	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
2934	Overlay: Not exporting hook B_RELEASE_OVERLAY.
2935	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
2936	GET_EDID_INFO: EDID info not available
2937	Haiku: tunnel access target=swap, command=get, value=0
2938	Haiku: tunnel access target=usepanel, command=get, value=0
2939	Haiku: tunnel access target=tvstandard, command=get, value=0
2940	GET_EDID_INFO: EDID info not available
2941	Haiku: tunnel access target=swap, command=get, value=0
2942	Haiku: tunnel access target=usepanel, command=get, value=0
2943	Haiku: tunnel access target=tvstandard, command=get, value=0
2944	GET_EDID_INFO: EDID info not available
2945	Haiku: tunnel access target=swap, command=get, value=0
2946	Haiku: tunnel access target=usepanel, command=get, value=0
2947	Haiku: tunnel access target=tvstandard, command=get, value=0
2948	GET_EDID_INFO: EDID info not available
2949	Haiku: tunnel access target=swap, command=get, value=0
2950	Haiku: tunnel access target=usepanel, command=get, value=0
2951	Haiku: tunnel access target=tvstandard, command=get, value=0
2952	GET_EDID_INFO: EDID info not available
2953	GET_ACCELERANT_DEVICE_INFO: returning info
2954	Haiku: tunnel access target=swap, command=get, value=0
2955	Haiku: tunnel access target=usepanel, command=get, value=0
2956	Haiku: tunnel access target=tvstandard, command=get, value=0
2957	Haiku: tunnel access target=swap, command=get, value=0
2958	Haiku: tunnel access target=usepanel, command=get, value=0
2959	Haiku: tunnel access target=tvstandard, command=get, value=0
2960	GET_EDID_INFO: EDID info not available
2961	GET_EDID_INFO: EDID info not available
2962	Haiku: tunnel access target=swap, command=get, value=0
2963	Haiku: tunnel access target=usepanel, command=get, value=0
2964	Haiku: tunnel access target=tvstandard, command=get, value=0
2965	Haiku: tunnel access target=swap, command=get, value=0
2966	Haiku: tunnel access target=usepanel, command=get, value=0
2967	Haiku: tunnel access target=tvstandard, command=get, value=0
2968	Haiku: tunnel access target=swap, command=get, value=0
2969	Haiku: tunnel access target=usepanel, command=get, value=0
2970	Haiku: tunnel access target=tvstandard, command=get, value=0
2971	Haiku: tunnel access target=swap, command=get, value=0
2972	Haiku: tunnel access target=usepanel, command=get, value=0
2973	Haiku: tunnel access target=tvstandard, command=get, value=0
2974	Haiku: tunnel access target=swap, command=set, value=0
2975	SETMODE: (ENTER) initial modeflags: $0000015f
2976	SETMODE: requested target pixelclock 65178kHz
2977	SETMODE: requested virtual_width 1024, virtual_height 768
2978	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
2979	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2980	DAC: NV4/NV10/NV20 restrictions apply
2981	DAC: pix VCO frequency found 521.428589Mhz
2982	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2983	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
2984	PROPOSEMODE: initial modeflags: $0000015f
2985	PROPOSEMODE: validated modeflags: $0000015f
2986	PROPOSEMODE: completed successfully.
2987	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
2988	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
2989	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
2990	SETMODE: setting DUALHEAD mode
2991	INIT: switching CRTC/DAC use to be straight-through
2992	SETMODE: target clock 65178kHz
2993	DAC: NV4/NV10/NV20 restrictions apply
2994	DAC: pix VCO frequency found 521.428589Mhz
2995	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
2996	DAC: dumping current pixelPLL settings:
2997	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
2998	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
2999	DAC: phase discriminator frequency is 1.785714Mhz
3000	DAC: VCO frequency is 521.428589Mhz
3001	DAC: pixelclock is 65.178574Mhz
3002	DAC: end of dump.
3003	DAC: current NV30_PLLSETUP settings: $00000000
3004	DAC: current (0x0000c040) settings: $340bc003
3005	DAC: Setting PIX PLL for pixelclock 65.178001
3006	DAC: PIX PLL frequency should be locked now...
3007	SETMODE: target2 clock 65178kHz
3008	DAC2: NV10/NV20 restrictions apply
3009	DAC2: pix VCO frequency found 521.428589Mhz
3010	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3011	DAC2: dumping current pixelPLL settings:
3012	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3013	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3014	DAC2: phase discriminator frequency is 1.785714Mhz
3015	DAC2: VCO frequency is 521.428589Mhz
3016	DAC2: pixelclock is 65.178574Mhz
3017	DAC2: end of dump.
3018	DAC2: current NV30_PLLSETUP settings: $00000000
3019	DAC2: current (0x0000c040) settings: $340bc003
3020	DAC2: Setting PIX PLL for pixelclock 65.178001
3021	DAC2: PIX PLL frequency should be locked now...
3022	DAC: Setting screen mode 4 brightness 1.000000
3023	DAC: setting palette
3024	DAC: PAL pixrdmsk readback $ff
3025	DAC2: Setting screen mode 4 brightness 1.000000
3026	DAC2: setting palette
3027	DAC2: PAL pixrdmsk readback $ff
3028	CRTC: setting card pitch (offset between lines)
3029	CRTC: offset register set to: $0200
3030	CRTC2: setting card pitch (offset between lines)
3031	CRTC2: offset register set to: $0200
3032	CRTC: setting card RAM to be displayed bpp 32
3033	CRTC: startadd: $00000800
3034	CRTC: frameRAM: $a0000000
3035	CRTC: framebuffer: $a0000800
3036	CRTC2: setting card RAM to be displayed bpp 32
3037	CRTC2: startadd: $00000800
3038	CRTC2: frameRAM: $a0000000
3039	CRTC2: framebuffer: $a0000800
3040	CRTC: setting timing
3041	CRTC: Setting full timing...
3042	CRTC:
3043	HTOT:a3
3044	HDISPEND:7f
3045	HBLNKS:7f
3046	HBLNKE:a7
3047	HSYNCS:83
3048	HSYNCE:94
3049	VTOT:324
3050	VDISPEND:2ff
3051	VBLNKS:2ff
3052	VBLNKE:325
3053	VSYNCS:303
3054	VSYNCE:309
3055	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
3056	CRTC2: setting timing
3057	CRTC2: Setting full timing...
3058	CRTC2:
3059	HTOT:a3
3060	HDISPEND:7f
3061	HBLNKS:7f
3062	HBLNKE:a7
3063	HSYNCS:83
3064	HSYNCE:94
3065	VTOT:324
3066	VDISPEND:2ff
3067	VBLNKS:2ff
3068	VBLNKE:325
3069	VSYNCS:303
3070	VSYNCE:309
3071	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
3072	ACC_DMA: timer numerator $000014c8, denominator $00000271
3073	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
3074	SET_DPMS_MODE: $00000001
3075	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
3076	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
3077	INIT: RAM access OK.
3078	SETMODE: booted since 411816.677000 mS
3079	Haiku: tunnel access target=usepanel, command=set, value=0
3080	Haiku: tunnel access target=tvstandard, command=set, value=0
3081	SETMODE: (ENTER) initial modeflags: $0000015f
3082	SETMODE: requested target pixelclock 162000kHz
3083	SETMODE: requested virtual_width 1600, virtual_height 1200
3084	PROPOSEMODE: (ENTER) requested virtual_width 1600, virtual_height 1200
3085	INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008
3086	DAC: NV4/NV10/NV20 restrictions apply
3087	DAC: pix VCO frequency found 323.076904Mhz
3088	DAC: pix PLL check: requested 162.000000MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
3089	PROPOSEMODE: validated virtual_width 1600, virtual_height 1200 pixels
3090	PROPOSEMODE: initial modeflags: $0000015f
3091	PROPOSEMODE: validated modeflags: $0000015f
3092	PROPOSEMODE: completed successfully.
3093	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
3094	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
3095	INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008
3096	SETMODE: setting DUALHEAD mode
3097	INIT: switching CRTC/DAC use to be straight-through
3098	SETMODE: target clock 161538kHz
3099	DAC: NV4/NV10/NV20 restrictions apply
3100	DAC: pix VCO frequency found 323.076904Mhz
3101	DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
3102	DAC: dumping current pixelPLL settings:
3103	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3104	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
3105	DAC: phase discriminator frequency is 1.785714Mhz
3106	DAC: VCO frequency is 521.428589Mhz
3107	DAC: pixelclock is 65.178574Mhz
3108	DAC: end of dump.
3109	DAC: current NV30_PLLSETUP settings: $00000000
3110	DAC: current (0x0000c040) settings: $340bc003
3111	DAC: Setting PIX PLL for pixelclock 161.537994
3112	DAC: PIX PLL frequency should be locked now...
3113	SETMODE: target2 clock 161538kHz
3114	DAC2: NV10/NV20 restrictions apply
3115	DAC2: pix VCO frequency found 323.076904Mhz
3116	DAC2: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
3117	DAC2: dumping current pixelPLL settings:
3118	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3119	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3120	DAC2: phase discriminator frequency is 1.785714Mhz
3121	DAC2: VCO frequency is 521.428589Mhz
3122	DAC2: pixelclock is 65.178574Mhz
3123	DAC2: end of dump.
3124	DAC2: current NV30_PLLSETUP settings: $00000000
3125	DAC2: current (0x0000c040) settings: $340bc003
3126	DAC2: Setting PIX PLL for pixelclock 161.537994
3127	DAC2: PIX PLL frequency should be locked now...
3128	DAC: Setting screen mode 4 brightness 1.000000
3129	DAC: setting palette
3130	DAC: PAL pixrdmsk readback $ff
3131	DAC2: Setting screen mode 4 brightness 1.000000
3132	DAC2: setting palette
3133	DAC2: PAL pixrdmsk readback $ff
3134	CRTC: setting card pitch (offset between lines)
3135	CRTC: offset register set to: $0320
3136	CRTC2: setting card pitch (offset between lines)
3137	CRTC2: offset register set to: $0320
3138	CRTC: setting card RAM to be displayed bpp 32
3139	CRTC: startadd: $00000800
3140	CRTC: frameRAM: $a0000000
3141	CRTC: framebuffer: $a0000800
3142	CRTC2: setting card RAM to be displayed bpp 32
3143	CRTC2: startadd: $00000800
3144	CRTC2: frameRAM: $a0000000
3145	CRTC2: framebuffer: $a0000800
3146	CRTC: setting timing
3147	CRTC: Setting full timing...
3148	CRTC:
3149	HTOT:109
3150	HDISPEND:c7
3151	HBLNKS:c7
3152	HBLNKE:10d
3153	HSYNCS:d0
3154	HSYNCE:e8
3155	VTOT:4e0
3156	VDISPEND:4af
3157	VBLNKS:4af
3158	VBLNKE:4e1
3159	VSYNCS:4b1
3160	VSYNCE:4b4
3161	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
3162	CRTC2: setting timing
3163	CRTC2: Setting full timing...
3164	CRTC2:
3165	HTOT:109
3166	HDISPEND:c7
3167	HBLNKS:c7
3168	HBLNKE:10d
3169	HSYNCS:d0
3170	HSYNCE:e8
3171	VTOT:4e0
3172	VDISPEND:4af
3173	VBLNKS:4af
3174	VBLNKE:4e1
3175	VSYNCS:4b1
3176	VSYNCE:4b4
3177	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
3178	ACC_DMA: timer numerator $000014c8, denominator $00000271
3179	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
3180	SET_DPMS_MODE: $00000001
3181	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
3182	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
3183	INIT: RAM access OK.
3184	SETMODE: booted since 411835.475000 mS
3185	Overlay: Not exporting hook B_OVERLAY_COUNT.
3186	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
3187	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
3188	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
3189	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
3190	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
3191	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
3192	Overlay: Not exporting hook B_RELEASE_OVERLAY.
3193	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
3194	GET_EDID_INFO: EDID info not available
3195	GET_EDID_INFO: EDID info not available
3196	GET_EDID_INFO: EDID info not available
3197	GET_EDID_INFO: EDID info not available
3198	Haiku: tunnel access target=swap, command=get, value=0
3199	Haiku: tunnel access target=usepanel, command=get, value=0
3200	Haiku: tunnel access target=tvstandard, command=get, value=0
3201	Haiku: tunnel access target=swap, command=set, value=0
3202	SETMODE: (ENTER) initial modeflags: $0000015f
3203	SETMODE: requested target pixelclock 161538kHz
3204	SETMODE: requested virtual_width 1600, virtual_height 1200
3205	PROPOSEMODE: (ENTER) requested virtual_width 1600, virtual_height 1200
3206	INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008
3207	DAC: NV4/NV10/NV20 restrictions apply
3208	DAC: pix VCO frequency found 323.076904Mhz
3209	DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
3210	PROPOSEMODE: validated virtual_width 1600, virtual_height 1200 pixels
3211	PROPOSEMODE: initial modeflags: $0000015f
3212	PROPOSEMODE: validated modeflags: $0000015f
3213	PROPOSEMODE: completed successfully.
3214	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
3215	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
3216	INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008
3217	SETMODE: setting DUALHEAD mode
3218	INIT: switching CRTC/DAC use to be straight-through
3219	SETMODE: target clock 161538kHz
3220	DAC: NV4/NV10/NV20 restrictions apply
3221	DAC: pix VCO frequency found 323.076904Mhz
3222	DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
3223	DAC: dumping current pixelPLL settings:
3224	DAC: divider1 settings ($00012a0d): M1=13, N1=42, P1=2
3225	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
3226	DAC: phase discriminator frequency is 1.923077Mhz
3227	DAC: VCO frequency is 323.076904Mhz
3228	DAC: pixelclock is 161.538452Mhz
3229	DAC: end of dump.
3230	DAC: current NV30_PLLSETUP settings: $00000000
3231	DAC: current (0x0000c040) settings: $340bc003
3232	DAC: Setting PIX PLL for pixelclock 161.537994
3233	DAC: PIX PLL frequency should be locked now...
3234	SETMODE: target2 clock 161538kHz
3235	DAC2: NV10/NV20 restrictions apply
3236	DAC2: pix VCO frequency found 323.076904Mhz
3237	DAC2: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01
3238	DAC2: dumping current pixelPLL settings:
3239	DAC2: divider1 settings ($00012a0d): M1=13, N1=42, P1=2
3240	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3241	DAC2: phase discriminator frequency is 1.923077Mhz
3242	DAC2: VCO frequency is 323.076904Mhz
3243	DAC2: pixelclock is 161.538452Mhz
3244	DAC2: end of dump.
3245	DAC2: current NV30_PLLSETUP settings: $00000000
3246	DAC2: current (0x0000c040) settings: $340bc003
3247	DAC2: Setting PIX PLL for pixelclock 161.537994
3248	DAC2: PIX PLL frequency should be locked now...
3249	DAC: Setting screen mode 4 brightness 1.000000
3250	DAC: setting palette
3251	DAC: PAL pixrdmsk readback $ff
3252	DAC2: Setting screen mode 4 brightness 1.000000
3253	DAC2: setting palette
3254	DAC2: PAL pixrdmsk readback $ff
3255	CRTC: setting card pitch (offset between lines)
3256	CRTC: offset register set to: $0320
3257	CRTC2: setting card pitch (offset between lines)
3258	CRTC2: offset register set to: $0320
3259	CRTC: setting card RAM to be displayed bpp 32
3260	CRTC: startadd: $00000800
3261	CRTC: frameRAM: $a0000000
3262	CRTC: framebuffer: $a0000800
3263	CRTC2: setting card RAM to be displayed bpp 32
3264	CRTC2: startadd: $00000800
3265	CRTC2: frameRAM: $a0000000
3266	CRTC2: framebuffer: $a0000800
3267	CRTC: setting timing
3268	CRTC: Setting full timing...
3269	CRTC:
3270	HTOT:109
3271	HDISPEND:c7
3272	HBLNKS:c7
3273	HBLNKE:10d
3274	HSYNCS:d0
3275	HSYNCE:e8
3276	VTOT:4e0
3277	VDISPEND:4af
3278	VBLNKS:4af
3279	VBLNKE:4e1
3280	VSYNCS:4b1
3281	VSYNCE:4b4
3282	CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b
3283	CRTC2: setting timing
3284	CRTC2: Setting full timing...
3285	CRTC2:
3286	HTOT:109
3287	HDISPEND:c7
3288	HBLNKS:c7
3289	HBLNKE:10d
3290	HSYNCS:d0
3291	HSYNCE:e8
3292	VTOT:4e0
3293	VDISPEND:4af
3294	VBLNKS:4af
3295	VBLNKE:4e1
3296	VSYNCS:4b1
3297	VSYNCE:4b4
3298	CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b
3299	ACC_DMA: timer numerator $000014c8, denominator $00000271
3300	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
3301	SET_DPMS_MODE: $00000001
3302	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
3303	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
3304	INIT: RAM access OK.
3305	SETMODE: booted since 415428.251000 mS
3306	Haiku: tunnel access target=usepanel, command=set, value=0
3307	Haiku: tunnel access target=tvstandard, command=set, value=0
3308	SETMODE: (ENTER) initial modeflags: $0000015f
3309	SETMODE: requested target pixelclock 64996kHz
3310	SETMODE: requested virtual_width 1024, virtual_height 768
3311	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
3312	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
3313	DAC: NV4/NV10/NV20 restrictions apply
3314	DAC: pix VCO frequency found 521.428589Mhz
3315	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3316	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
3317	PROPOSEMODE: initial modeflags: $0000015f
3318	PROPOSEMODE: validated modeflags: $0000015f
3319	PROPOSEMODE: completed successfully.
3320	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
3321	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
3322	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
3323	SETMODE: setting DUALHEAD mode
3324	INIT: switching CRTC/DAC use to be straight-through
3325	SETMODE: target clock 65178kHz
3326	DAC: NV4/NV10/NV20 restrictions apply
3327	DAC: pix VCO frequency found 521.428589Mhz
3328	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3329	DAC: dumping current pixelPLL settings:
3330	DAC: divider1 settings ($00012a0d): M1=13, N1=42, P1=2
3331	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
3332	DAC: phase discriminator frequency is 1.923077Mhz
3333	DAC: VCO frequency is 323.076904Mhz
3334	DAC: pixelclock is 161.538452Mhz
3335	DAC: end of dump.
3336	DAC: current NV30_PLLSETUP settings: $00000000
3337	DAC: current (0x0000c040) settings: $340bc003
3338	DAC: Setting PIX PLL for pixelclock 65.178001
3339	DAC: PIX PLL frequency should be locked now...
3340	SETMODE: target2 clock 65178kHz
3341	DAC2: NV10/NV20 restrictions apply
3342	DAC2: pix VCO frequency found 521.428589Mhz
3343	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3344	DAC2: dumping current pixelPLL settings:
3345	DAC2: divider1 settings ($00012a0d): M1=13, N1=42, P1=2
3346	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3347	DAC2: phase discriminator frequency is 1.923077Mhz
3348	DAC2: VCO frequency is 323.076904Mhz
3349	DAC2: pixelclock is 161.538452Mhz
3350	DAC2: end of dump.
3351	DAC2: current NV30_PLLSETUP settings: $00000000
3352	DAC2: current (0x0000c040) settings: $340bc003
3353	DAC2: Setting PIX PLL for pixelclock 65.178001
3354	DAC2: PIX PLL frequency should be locked now...
3355	DAC: Setting screen mode 4 brightness 1.000000
3356	DAC: setting palette
3357	DAC: PAL pixrdmsk readback $ff
3358	DAC2: Setting screen mode 4 brightness 1.000000
3359	DAC2: setting palette
3360	DAC2: PAL pixrdmsk readback $ff
3361	CRTC: setting card pitch (offset between lines)
3362	CRTC: offset register set to: $0200
3363	CRTC2: setting card pitch (offset between lines)
3364	CRTC2: offset register set to: $0200
3365	CRTC: setting card RAM to be displayed bpp 32
3366	CRTC: startadd: $00000800
3367	CRTC: frameRAM: $a0000000
3368	CRTC: framebuffer: $a0000800
3369	CRTC2: setting card RAM to be displayed bpp 32
3370	CRTC2: startadd: $00000800
3371	CRTC2: frameRAM: $a0000000
3372	CRTC2: framebuffer: $a0000800
3373	CRTC: setting timing
3374	CRTC: Setting full timing...
3375	CRTC:
3376	HTOT:a3
3377	HDISPEND:7f
3378	HBLNKS:7f
3379	HBLNKE:a7
3380	HSYNCS:83
3381	HSYNCE:94
3382	VTOT:324
3383	VDISPEND:2ff
3384	VBLNKS:2ff
3385	VBLNKE:325
3386	VSYNCS:303
3387	VSYNCE:309
3388	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
3389	CRTC2: setting timing
3390	CRTC2: Setting full timing...
3391	CRTC2:
3392	HTOT:a3
3393	HDISPEND:7f
3394	HBLNKS:7f
3395	HBLNKE:a7
3396	HSYNCS:83
3397	HSYNCE:94
3398	VTOT:324
3399	VDISPEND:2ff
3400	VBLNKS:2ff
3401	VBLNKE:325
3402	VSYNCS:303
3403	VSYNCE:309
3404	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
3405	ACC_DMA: timer numerator $000014c8, denominator $00000271
3406	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
3407	SET_DPMS_MODE: $00000001
3408	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
3409	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
3410	INIT: RAM access OK.
3411	SETMODE: booted since 415456.378000 mS
3412	Overlay: Not exporting hook B_OVERLAY_COUNT.
3413	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
3414	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
3415	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
3416	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
3417	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
3418	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
3419	Overlay: Not exporting hook B_RELEASE_OVERLAY.
3420	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
3421	GET_EDID_INFO: EDID info not available
3422	Haiku: tunnel access target=swap, command=get, value=0
3423	Haiku: tunnel access target=usepanel, command=get, value=0
3424	Haiku: tunnel access target=tvstandard, command=get, value=0
3425	GET_EDID_INFO: EDID info not available
3426	Haiku: tunnel access target=swap, command=get, value=0
3427	Haiku: tunnel access target=usepanel, command=get, value=0
3428	Haiku: tunnel access target=tvstandard, command=get, value=0
3429	GET_EDID_INFO: EDID info not available
3430	Haiku: tunnel access target=swap, command=get, value=0
3431	Haiku: tunnel access target=usepanel, command=get, value=0
3432	Haiku: tunnel access target=tvstandard, command=get, value=0
3433	GET_EDID_INFO: EDID info not available
3434	Haiku: tunnel access target=swap, command=get, value=0
3435	Haiku: tunnel access target=usepanel, command=get, value=0
3436	Haiku: tunnel access target=tvstandard, command=get, value=0
3437	GET_EDID_INFO: EDID info not available
3438	GET_ACCELERANT_DEVICE_INFO: returning info
3439	Haiku: tunnel access target=swap, command=get, value=0
3440	Haiku: tunnel access target=usepanel, command=get, value=0
3441	Haiku: tunnel access target=tvstandard, command=get, value=0
3442	Haiku: tunnel access target=swap, command=get, value=0
3443	Haiku: tunnel access target=usepanel, command=get, value=0
3444	Haiku: tunnel access target=tvstandard, command=get, value=0
3445	GET_EDID_INFO: EDID info not available
3446	GET_EDID_INFO: EDID info not available
3447	Haiku: tunnel access target=swap, command=get, value=0
3448	Haiku: tunnel access target=usepanel, command=get, value=0
3449	Haiku: tunnel access target=tvstandard, command=get, value=0
3450	Haiku: tunnel access target=swap, command=get, value=0
3451	Haiku: tunnel access target=usepanel, command=get, value=0
3452	Haiku: tunnel access target=tvstandard, command=get, value=0
3453	Haiku: tunnel access target=swap, command=get, value=0
3454	Haiku: tunnel access target=usepanel, command=get, value=0
3455	Haiku: tunnel access target=tvstandard, command=get, value=0
3456	Haiku: tunnel access target=swap, command=get, value=0
3457	Haiku: tunnel access target=usepanel, command=get, value=0
3458	Haiku: tunnel access target=tvstandard, command=get, value=0
3459	Haiku: tunnel access target=swap, command=set, value=0
3460	SETMODE: (ENTER) initial modeflags: $0000015f
3461	SETMODE: requested target pixelclock 65178kHz
3462	SETMODE: requested virtual_width 1024, virtual_height 768
3463	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
3464	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
3465	DAC: NV4/NV10/NV20 restrictions apply
3466	DAC: pix VCO frequency found 521.428589Mhz
3467	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3468	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
3469	PROPOSEMODE: initial modeflags: $0000015f
3470	PROPOSEMODE: validated modeflags: $0000015f
3471	PROPOSEMODE: completed successfully.
3472	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
3473	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
3474	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
3475	SETMODE: setting DUALHEAD mode
3476	INIT: switching CRTC/DAC use to be straight-through
3477	SETMODE: target clock 65178kHz
3478	DAC: NV4/NV10/NV20 restrictions apply
3479	DAC: pix VCO frequency found 521.428589Mhz
3480	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3481	DAC: dumping current pixelPLL settings:
3482	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3483	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
3484	DAC: phase discriminator frequency is 1.785714Mhz
3485	DAC: VCO frequency is 521.428589Mhz
3486	DAC: pixelclock is 65.178574Mhz
3487	DAC: end of dump.
3488	DAC: current NV30_PLLSETUP settings: $00000000
3489	DAC: current (0x0000c040) settings: $340bc003
3490	DAC: Setting PIX PLL for pixelclock 65.178001
3491	DAC: PIX PLL frequency should be locked now...
3492	SETMODE: target2 clock 65178kHz
3493	DAC2: NV10/NV20 restrictions apply
3494	DAC2: pix VCO frequency found 521.428589Mhz
3495	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3496	DAC2: dumping current pixelPLL settings:
3497	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3498	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3499	DAC2: phase discriminator frequency is 1.785714Mhz
3500	DAC2: VCO frequency is 521.428589Mhz
3501	DAC2: pixelclock is 65.178574Mhz
3502	DAC2: end of dump.
3503	DAC2: current NV30_PLLSETUP settings: $00000000
3504	DAC2: current (0x0000c040) settings: $340bc003
3505	DAC2: Setting PIX PLL for pixelclock 65.178001
3506	DAC2: PIX PLL frequency should be locked now...
3507	DAC: Setting screen mode 4 brightness 1.000000
3508	DAC: setting palette
3509	DAC: PAL pixrdmsk readback $ff
3510	DAC2: Setting screen mode 4 brightness 1.000000
3511	DAC2: setting palette
3512	DAC2: PAL pixrdmsk readback $ff
3513	CRTC: setting card pitch (offset between lines)
3514	CRTC: offset register set to: $0200
3515	CRTC2: setting card pitch (offset between lines)
3516	CRTC2: offset register set to: $0200
3517	CRTC: setting card RAM to be displayed bpp 32
3518	CRTC: startadd: $00000800
3519	CRTC: frameRAM: $a0000000
3520	CRTC: framebuffer: $a0000800
3521	CRTC2: setting card RAM to be displayed bpp 32
3522	CRTC2: startadd: $00000800
3523	CRTC2: frameRAM: $a0000000
3524	CRTC2: framebuffer: $a0000800
3525	CRTC: setting timing
3526	CRTC: Setting full timing...
3527	CRTC:
3528	HTOT:a3
3529	HDISPEND:7f
3530	HBLNKS:7f
3531	HBLNKE:a7
3532	HSYNCS:83
3533	HSYNCE:94
3534	VTOT:324
3535	VDISPEND:2ff
3536	VBLNKS:2ff
3537	VBLNKE:325
3538	VSYNCS:303
3539	VSYNCE:309
3540	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
3541	CRTC2: setting timing
3542	CRTC2: Setting full timing...
3543	CRTC2:
3544	HTOT:a3
3545	HDISPEND:7f
3546	HBLNKS:7f
3547	HBLNKE:a7
3548	HSYNCS:83
3549	HSYNCE:94
3550	VTOT:324
3551	VDISPEND:2ff
3552	VBLNKS:2ff
3553	VBLNKE:325
3554	VSYNCS:303
3555	VSYNCE:309
3556	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
3557	ACC_DMA: timer numerator $000014c8, denominator $00000271
3558	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
3559	SET_DPMS_MODE: $00000001
3560	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
3561	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
3562	INIT: RAM access OK.
3563	SETMODE: booted since 422321.318000 mS
3564	Haiku: tunnel access target=usepanel, command=set, value=0
3565	Haiku: tunnel access target=tvstandard, command=set, value=0
3566	SETMODE: (ENTER) initial modeflags: $0000015f
3567	SETMODE: requested target pixelclock 204751kHz
3568	SETMODE: requested virtual_width 1792, virtual_height 1344
3569	PROPOSEMODE: (ENTER) requested virtual_width 1792, virtual_height 1344
3570	INIT: memory pitch will be set to 1792 pixels for colorspace 0x00000008
3571	DAC: NV4/NV10/NV20 restrictions apply
3572	DAC: pix VCO frequency found 407.692291Mhz
3573	DAC: pix PLL check: requested 204.751007MHz got 203.846146MHz, mnp 0x0d 0x35 0x01
3574	PROPOSEMODE: validated virtual_width 1792, virtual_height 1344 pixels
3575	PROPOSEMODE: initial modeflags: $0000015f
3576	PROPOSEMODE: validated modeflags: $0000015f
3577	PROPOSEMODE: completed successfully.
3578	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
3579	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
3580	INIT: memory pitch will be set to 1792 pixels for colorspace 0x00000008
3581	SETMODE: setting DUALHEAD mode
3582	INIT: switching CRTC/DAC use to be straight-through
3583	SETMODE: target clock 203846kHz
3584	DAC: NV4/NV10/NV20 restrictions apply
3585	DAC: pix VCO frequency found 407.692291Mhz
3586	DAC: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01
3587	DAC: dumping current pixelPLL settings:
3588	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3589	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
3590	DAC: phase discriminator frequency is 1.785714Mhz
3591	DAC: VCO frequency is 521.428589Mhz
3592	DAC: pixelclock is 65.178574Mhz
3593	DAC: end of dump.
3594	DAC: current NV30_PLLSETUP settings: $00000000
3595	DAC: current (0x0000c040) settings: $340bc003
3596	DAC: Setting PIX PLL for pixelclock 203.845993
3597	DAC: PIX PLL frequency should be locked now...
3598	SETMODE: target2 clock 203846kHz
3599	DAC2: NV10/NV20 restrictions apply
3600	DAC2: pix VCO frequency found 407.692291Mhz
3601	DAC2: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01
3602	DAC2: dumping current pixelPLL settings:
3603	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3604	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3605	DAC2: phase discriminator frequency is 1.785714Mhz
3606	DAC2: VCO frequency is 521.428589Mhz
3607	DAC2: pixelclock is 65.178574Mhz
3608	DAC2: end of dump.
3609	DAC2: current NV30_PLLSETUP settings: $00000000
3610	DAC2: current (0x0000c040) settings: $340bc003
3611	DAC2: Setting PIX PLL for pixelclock 203.845993
3612	DAC2: PIX PLL frequency should be locked now...
3613	DAC: Setting screen mode 4 brightness 1.000000
3614	DAC: setting palette
3615	DAC: PAL pixrdmsk readback $ff
3616	DAC2: Setting screen mode 4 brightness 1.000000
3617	DAC2: setting palette
3618	DAC2: PAL pixrdmsk readback $ff
3619	CRTC: setting card pitch (offset between lines)
3620	CRTC: offset register set to: $0380
3621	CRTC2: setting card pitch (offset between lines)
3622	CRTC2: offset register set to: $0380
3623	CRTC: setting card RAM to be displayed bpp 32
3624	CRTC: startadd: $00000800
3625	CRTC: frameRAM: $a0000000
3626	CRTC: framebuffer: $a0000800
3627	CRTC2: setting card RAM to be displayed bpp 32
3628	CRTC2: startadd: $00000800
3629	CRTC2: frameRAM: $a0000000
3630	CRTC2: framebuffer: $a0000800
3631	CRTC: setting timing
3632	CRTC: Setting full timing...
3633	CRTC:
3634	HTOT:12d
3635	HDISPEND:df
3636	HBLNKS:df
3637	HBLNKE:131
3638	HSYNCS:f0
3639	HSYNCE:109
3640	VTOT:570
3641	VDISPEND:53f
3642	VBLNKS:53f
3643	VBLNKE:571
3644	VSYNCS:541
3645	VSYNCE:544
3646	CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b
3647	CRTC2: setting timing
3648	CRTC2: Setting full timing...
3649	CRTC2:
3650	HTOT:12d
3651	HDISPEND:df
3652	HBLNKS:df
3653	HBLNKE:131
3654	HSYNCS:f0
3655	HSYNCE:109
3656	VTOT:570
3657	VDISPEND:53f
3658	VBLNKS:53f
3659	VBLNKE:571
3660	VSYNCS:541
3661	VSYNCE:544
3662	CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b
3663	ACC_DMA: timer numerator $000014c8, denominator $00000271
3664	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
3665	SET_DPMS_MODE: $00000001
3666	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
3667	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
3668	INIT: RAM access OK.
3669	SETMODE: booted since 422339.361000 mS
3670	Overlay: Not exporting hook B_OVERLAY_COUNT.
3671	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
3672	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
3673	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
3674	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
3675	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
3676	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
3677	Overlay: Not exporting hook B_RELEASE_OVERLAY.
3678	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
3679	GET_EDID_INFO: EDID info not available
3680	GET_EDID_INFO: EDID info not available
3681	GET_EDID_INFO: EDID info not available
3682	GET_EDID_INFO: EDID info not available
3683	Haiku: tunnel access target=swap, command=get, value=0
3684	Haiku: tunnel access target=usepanel, command=get, value=0
3685	Haiku: tunnel access target=tvstandard, command=get, value=0
3686	Haiku: tunnel access target=swap, command=set, value=0
3687	SETMODE: (ENTER) initial modeflags: $0000015f
3688	SETMODE: requested target pixelclock 203846kHz
3689	SETMODE: requested virtual_width 1792, virtual_height 1344
3690	PROPOSEMODE: (ENTER) requested virtual_width 1792, virtual_height 1344
3691	INIT: memory pitch will be set to 1792 pixels for colorspace 0x00000008
3692	DAC: NV4/NV10/NV20 restrictions apply
3693	DAC: pix VCO frequency found 407.692291Mhz
3694	DAC: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01
3695	PROPOSEMODE: validated virtual_width 1792, virtual_height 1344 pixels
3696	PROPOSEMODE: initial modeflags: $0000015f
3697	PROPOSEMODE: validated modeflags: $0000015f
3698	PROPOSEMODE: completed successfully.
3699	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
3700	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
3701	INIT: memory pitch will be set to 1792 pixels for colorspace 0x00000008
3702	SETMODE: setting DUALHEAD mode
3703	INIT: switching CRTC/DAC use to be straight-through
3704	SETMODE: target clock 203846kHz
3705	DAC: NV4/NV10/NV20 restrictions apply
3706	DAC: pix VCO frequency found 407.692291Mhz
3707	DAC: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01
3708	DAC: dumping current pixelPLL settings:
3709	DAC: divider1 settings ($0001350d): M1=13, N1=53, P1=2
3710	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
3711	DAC: phase discriminator frequency is 1.923077Mhz
3712	DAC: VCO frequency is 407.692291Mhz
3713	DAC: pixelclock is 203.846146Mhz
3714	DAC: end of dump.
3715	DAC: current NV30_PLLSETUP settings: $00000000
3716	DAC: current (0x0000c040) settings: $340bc003
3717	DAC: Setting PIX PLL for pixelclock 203.845993
3718	DAC: PIX PLL frequency should be locked now...
3719	SETMODE: target2 clock 203846kHz
3720	DAC2: NV10/NV20 restrictions apply
3721	DAC2: pix VCO frequency found 407.692291Mhz
3722	DAC2: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01
3723	DAC2: dumping current pixelPLL settings:
3724	DAC2: divider1 settings ($0001350d): M1=13, N1=53, P1=2
3725	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3726	DAC2: phase discriminator frequency is 1.923077Mhz
3727	DAC2: VCO frequency is 407.692291Mhz
3728	DAC2: pixelclock is 203.846146Mhz
3729	DAC2: end of dump.
3730	DAC2: current NV30_PLLSETUP settings: $00000000
3731	DAC2: current (0x0000c040) settings: $340bc003
3732	DAC2: Setting PIX PLL for pixelclock 203.845993
3733	DAC2: PIX PLL frequency should be locked now...
3734	DAC: Setting screen mode 4 brightness 1.000000
3735	DAC: setting palette
3736	DAC: PAL pixrdmsk readback $ff
3737	DAC2: Setting screen mode 4 brightness 1.000000
3738	DAC2: setting palette
3739	DAC2: PAL pixrdmsk readback $ff
3740	CRTC: setting card pitch (offset between lines)
3741	CRTC: offset register set to: $0380
3742	CRTC2: setting card pitch (offset between lines)
3743	CRTC2: offset register set to: $0380
3744	CRTC: setting card RAM to be displayed bpp 32
3745	CRTC: startadd: $00000800
3746	CRTC: frameRAM: $a0000000
3747	CRTC: framebuffer: $a0000800
3748	CRTC2: setting card RAM to be displayed bpp 32
3749	CRTC2: startadd: $00000800
3750	CRTC2: frameRAM: $a0000000
3751	CRTC2: framebuffer: $a0000800
3752	CRTC: setting timing
3753	CRTC: Setting full timing...
3754	CRTC:
3755	HTOT:12d
3756	HDISPEND:df
3757	HBLNKS:df
3758	HBLNKE:131
3759	HSYNCS:f0
3760	HSYNCE:109
3761	VTOT:570
3762	VDISPEND:53f
3763	VBLNKS:53f
3764	VBLNKE:571
3765	VSYNCS:541
3766	VSYNCE:544
3767	CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b
3768	CRTC2: setting timing
3769	CRTC2: Setting full timing...
3770	CRTC2:
3771	HTOT:12d
3772	HDISPEND:df
3773	HBLNKS:df
3774	HBLNKE:131
3775	HSYNCS:f0
3776	HSYNCE:109
3777	VTOT:570
3778	VDISPEND:53f
3779	VBLNKS:53f
3780	VBLNKE:571
3781	VSYNCS:541
3782	VSYNCE:544
3783	CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b
3784	ACC_DMA: timer numerator $000014c8, denominator $00000271
3785	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
3786	SET_DPMS_MODE: $00000001
3787	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
3788	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
3789	INIT: RAM access OK.
3790	SETMODE: booted since 434425.313000 mS
3791	Haiku: tunnel access target=usepanel, command=set, value=0
3792	Haiku: tunnel access target=tvstandard, command=set, value=0
3793	SETMODE: (ENTER) initial modeflags: $0000015f
3794	SETMODE: requested target pixelclock 64996kHz
3795	SETMODE: requested virtual_width 1024, virtual_height 768
3796	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
3797	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
3798	DAC: NV4/NV10/NV20 restrictions apply
3799	DAC: pix VCO frequency found 521.428589Mhz
3800	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3801	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
3802	PROPOSEMODE: initial modeflags: $0000015f
3803	PROPOSEMODE: validated modeflags: $0000015f
3804	PROPOSEMODE: completed successfully.
3805	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
3806	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
3807	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
3808	SETMODE: setting DUALHEAD mode
3809	INIT: switching CRTC/DAC use to be straight-through
3810	SETMODE: target clock 65178kHz
3811	DAC: NV4/NV10/NV20 restrictions apply
3812	DAC: pix VCO frequency found 521.428589Mhz
3813	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3814	DAC: dumping current pixelPLL settings:
3815	DAC: divider1 settings ($0001350d): M1=13, N1=53, P1=2
3816	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
3817	DAC: phase discriminator frequency is 1.923077Mhz
3818	DAC: VCO frequency is 407.692291Mhz
3819	DAC: pixelclock is 203.846146Mhz
3820	DAC: end of dump.
3821	DAC: current NV30_PLLSETUP settings: $00000000
3822	DAC: current (0x0000c040) settings: $340bc003
3823	DAC: Setting PIX PLL for pixelclock 65.178001
3824	DAC: PIX PLL frequency should be locked now...
3825	SETMODE: target2 clock 65178kHz
3826	DAC2: NV10/NV20 restrictions apply
3827	DAC2: pix VCO frequency found 521.428589Mhz
3828	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3829	DAC2: dumping current pixelPLL settings:
3830	DAC2: divider1 settings ($0001350d): M1=13, N1=53, P1=2
3831	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3832	DAC2: phase discriminator frequency is 1.923077Mhz
3833	DAC2: VCO frequency is 407.692291Mhz
3834	DAC2: pixelclock is 203.846146Mhz
3835	DAC2: end of dump.
3836	DAC2: current NV30_PLLSETUP settings: $00000000
3837	DAC2: current (0x0000c040) settings: $340bc003
3838	DAC2: Setting PIX PLL for pixelclock 65.178001
3839	DAC2: PIX PLL frequency should be locked now...
3840	DAC: Setting screen mode 4 brightness 1.000000
3841	DAC: setting palette
3842	DAC: PAL pixrdmsk readback $ff
3843	DAC2: Setting screen mode 4 brightness 1.000000
3844	DAC2: setting palette
3845	DAC2: PAL pixrdmsk readback $ff
3846	CRTC: setting card pitch (offset between lines)
3847	CRTC: offset register set to: $0200
3848	CRTC2: setting card pitch (offset between lines)
3849	CRTC2: offset register set to: $0200
3850	CRTC: setting card RAM to be displayed bpp 32
3851	CRTC: startadd: $00000800
3852	CRTC: frameRAM: $a0000000
3853	CRTC: framebuffer: $a0000800
3854	CRTC2: setting card RAM to be displayed bpp 32
3855	CRTC2: startadd: $00000800
3856	CRTC2: frameRAM: $a0000000
3857	CRTC2: framebuffer: $a0000800
3858	CRTC: setting timing
3859	CRTC: Setting full timing...
3860	CRTC:
3861	HTOT:a3
3862	HDISPEND:7f
3863	HBLNKS:7f
3864	HBLNKE:a7
3865	HSYNCS:83
3866	HSYNCE:94
3867	VTOT:324
3868	VDISPEND:2ff
3869	VBLNKS:2ff
3870	VBLNKE:325
3871	VSYNCS:303
3872	VSYNCE:309
3873	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
3874	CRTC2: setting timing
3875	CRTC2: Setting full timing...
3876	CRTC2:
3877	HTOT:a3
3878	HDISPEND:7f
3879	HBLNKS:7f
3880	HBLNKE:a7
3881	HSYNCS:83
3882	HSYNCE:94
3883	VTOT:324
3884	VDISPEND:2ff
3885	VBLNKS:2ff
3886	VBLNKE:325
3887	VSYNCS:303
3888	VSYNCE:309
3889	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
3890	ACC_DMA: timer numerator $000014c8, denominator $00000271
3891	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
3892	SET_DPMS_MODE: $00000001
3893	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
3894	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
3895	INIT: RAM access OK.
3896	SETMODE: booted since 434457.788000 mS
3897	Overlay: Not exporting hook B_OVERLAY_COUNT.
3898	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
3899	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
3900	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
3901	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
3902	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
3903	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
3904	Overlay: Not exporting hook B_RELEASE_OVERLAY.
3905	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
3906	GET_EDID_INFO: EDID info not available
3907	Haiku: tunnel access target=swap, command=get, value=0
3908	Haiku: tunnel access target=usepanel, command=get, value=0
3909	Haiku: tunnel access target=tvstandard, command=get, value=0
3910	GET_EDID_INFO: EDID info not available
3911	Haiku: tunnel access target=swap, command=get, value=0
3912	Haiku: tunnel access target=usepanel, command=get, value=0
3913	Haiku: tunnel access target=tvstandard, command=get, value=0
3914	GET_EDID_INFO: EDID info not available
3915	Haiku: tunnel access target=swap, command=get, value=0
3916	Haiku: tunnel access target=usepanel, command=get, value=0
3917	Haiku: tunnel access target=tvstandard, command=get, value=0
3918	GET_EDID_INFO: EDID info not available
3919	Haiku: tunnel access target=swap, command=get, value=0
3920	Haiku: tunnel access target=usepanel, command=get, value=0
3921	Haiku: tunnel access target=tvstandard, command=get, value=0
3922	GET_EDID_INFO: EDID info not available
3923	GET_ACCELERANT_DEVICE_INFO: returning info
3924	Haiku: tunnel access target=swap, command=get, value=0
3925	Haiku: tunnel access target=usepanel, command=get, value=0
3926	Haiku: tunnel access target=tvstandard, command=get, value=0
3927	Haiku: tunnel access target=swap, command=get, value=0
3928	Haiku: tunnel access target=usepanel, command=get, value=0
3929	Haiku: tunnel access target=tvstandard, command=get, value=0
3930	GET_EDID_INFO: EDID info not available
3931	GET_EDID_INFO: EDID info not available
3932	Haiku: tunnel access target=swap, command=get, value=0
3933	Haiku: tunnel access target=usepanel, command=get, value=0
3934	Haiku: tunnel access target=tvstandard, command=get, value=0
3935	Haiku: tunnel access target=swap, command=get, value=0
3936	Haiku: tunnel access target=usepanel, command=get, value=0
3937	Haiku: tunnel access target=tvstandard, command=get, value=0
3938	Haiku: tunnel access target=swap, command=get, value=0
3939	Haiku: tunnel access target=usepanel, command=get, value=0
3940	Haiku: tunnel access target=tvstandard, command=get, value=0
3941	Haiku: tunnel access target=swap, command=get, value=0
3942	Haiku: tunnel access target=usepanel, command=get, value=0
3943	Haiku: tunnel access target=tvstandard, command=get, value=0
3944	Haiku: tunnel access target=swap, command=set, value=0
3945	SETMODE: (ENTER) initial modeflags: $0000015f
3946	SETMODE: requested target pixelclock 65178kHz
3947	SETMODE: requested virtual_width 1024, virtual_height 768
3948	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
3949	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
3950	DAC: NV4/NV10/NV20 restrictions apply
3951	DAC: pix VCO frequency found 521.428589Mhz
3952	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3953	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
3954	PROPOSEMODE: initial modeflags: $0000015f
3955	PROPOSEMODE: validated modeflags: $0000015f
3956	PROPOSEMODE: completed successfully.
3957	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
3958	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
3959	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
3960	SETMODE: setting DUALHEAD mode
3961	INIT: switching CRTC/DAC use to be straight-through
3962	SETMODE: target clock 65178kHz
3963	DAC: NV4/NV10/NV20 restrictions apply
3964	DAC: pix VCO frequency found 521.428589Mhz
3965	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3966	DAC: dumping current pixelPLL settings:
3967	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3968	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
3969	DAC: phase discriminator frequency is 1.785714Mhz
3970	DAC: VCO frequency is 521.428589Mhz
3971	DAC: pixelclock is 65.178574Mhz
3972	DAC: end of dump.
3973	DAC: current NV30_PLLSETUP settings: $00000000
3974	DAC: current (0x0000c040) settings: $340bc003
3975	DAC: Setting PIX PLL for pixelclock 65.178001
3976	DAC: PIX PLL frequency should be locked now...
3977	SETMODE: target2 clock 65178kHz
3978	DAC2: NV10/NV20 restrictions apply
3979	DAC2: pix VCO frequency found 521.428589Mhz
3980	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
3981	DAC2: dumping current pixelPLL settings:
3982	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
3983	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
3984	DAC2: phase discriminator frequency is 1.785714Mhz
3985	DAC2: VCO frequency is 521.428589Mhz
3986	DAC2: pixelclock is 65.178574Mhz
3987	DAC2: end of dump.
3988	DAC2: current NV30_PLLSETUP settings: $00000000
3989	DAC2: current (0x0000c040) settings: $340bc003
3990	DAC2: Setting PIX PLL for pixelclock 65.178001
3991	DAC2: PIX PLL frequency should be locked now...
3992	DAC: Setting screen mode 4 brightness 1.000000
3993	DAC: setting palette
3994	DAC: PAL pixrdmsk readback $ff
3995	DAC2: Setting screen mode 4 brightness 1.000000
3996	DAC2: setting palette
3997	DAC2: PAL pixrdmsk readback $ff
3998	CRTC: setting card pitch (offset between lines)
3999	CRTC: offset register set to: $0200
4000	CRTC2: setting card pitch (offset between lines)
4001	CRTC2: offset register set to: $0200
4002	CRTC: setting card RAM to be displayed bpp 32
4003	CRTC: startadd: $00000800
4004	CRTC: frameRAM: $a0000000
4005	CRTC: framebuffer: $a0000800
4006	CRTC2: setting card RAM to be displayed bpp 32
4007	CRTC2: startadd: $00000800
4008	CRTC2: frameRAM: $a0000000
4009	CRTC2: framebuffer: $a0000800
4010	CRTC: setting timing
4011	CRTC: Setting full timing...
4012	CRTC:
4013	HTOT:a3
4014	HDISPEND:7f
4015	HBLNKS:7f
4016	HBLNKE:a7
4017	HSYNCS:83
4018	HSYNCE:94
4019	VTOT:324
4020	VDISPEND:2ff
4021	VBLNKS:2ff
4022	VBLNKE:325
4023	VSYNCS:303
4024	VSYNCE:309
4025	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
4026	CRTC2: setting timing
4027	CRTC2: Setting full timing...
4028	CRTC2:
4029	HTOT:a3
4030	HDISPEND:7f
4031	HBLNKS:7f
4032	HBLNKE:a7
4033	HSYNCS:83
4034	HSYNCE:94
4035	VTOT:324
4036	VDISPEND:2ff
4037	VBLNKS:2ff
4038	VBLNKE:325
4039	VSYNCS:303
4040	VSYNCE:309
4041	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
4042	ACC_DMA: timer numerator $000014c8, denominator $00000271
4043	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
4044	SET_DPMS_MODE: $00000001
4045	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
4046	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
4047	INIT: RAM access OK.
4048	SETMODE: booted since 442319.809000 mS
4049	Haiku: tunnel access target=usepanel, command=set, value=0
4050	Haiku: tunnel access target=tvstandard, command=set, value=0
4051	SETMODE: (ENTER) initial modeflags: $0000015f
4052	SETMODE: requested target pixelclock 218268kHz
4053	SETMODE: requested virtual_width 1856, virtual_height 1392
4054	PROPOSEMODE: (ENTER) requested virtual_width 1856, virtual_height 1392
4055	INIT: memory pitch will be set to 1856 pixels for colorspace 0x00000008
4056	DAC: NV4/NV10/NV20 restrictions apply
4057	DAC: pix VCO frequency found 435.714294Mhz
4058	DAC: pix PLL check: requested 218.268005MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01
4059	PROPOSEMODE: validated virtual_width 1856, virtual_height 1392 pixels
4060	PROPOSEMODE: initial modeflags: $0000015f
4061	PROPOSEMODE: validated modeflags: $0000015f
4062	PROPOSEMODE: completed successfully.
4063	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
4064	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
4065	INIT: memory pitch will be set to 1856 pixels for colorspace 0x00000008
4066	SETMODE: setting DUALHEAD mode
4067	INIT: switching CRTC/DAC use to be straight-through
4068	SETMODE: target clock 217857kHz
4069	DAC: NV4/NV10/NV20 restrictions apply
4070	DAC: pix VCO frequency found 435.714294Mhz
4071	DAC: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01
4072	DAC: dumping current pixelPLL settings:
4073	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
4074	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
4075	DAC: phase discriminator frequency is 1.785714Mhz
4076	DAC: VCO frequency is 521.428589Mhz
4077	DAC: pixelclock is 65.178574Mhz
4078	DAC: end of dump.
4079	DAC: current NV30_PLLSETUP settings: $00000000
4080	DAC: current (0x0000c040) settings: $340bc003
4081	DAC: Setting PIX PLL for pixelclock 217.856995
4082	DAC: PIX PLL frequency should be locked now...
4083	SETMODE: target2 clock 217857kHz
4084	DAC2: NV10/NV20 restrictions apply
4085	DAC2: pix VCO frequency found 435.714294Mhz
4086	DAC2: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01
4087	DAC2: dumping current pixelPLL settings:
4088	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
4089	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
4090	DAC2: phase discriminator frequency is 1.785714Mhz
4091	DAC2: VCO frequency is 521.428589Mhz
4092	DAC2: pixelclock is 65.178574Mhz
4093	DAC2: end of dump.
4094	DAC2: current NV30_PLLSETUP settings: $00000000
4095	DAC2: current (0x0000c040) settings: $340bc003
4096	DAC2: Setting PIX PLL for pixelclock 217.856995
4097	DAC2: PIX PLL frequency should be locked now...
4098	DAC: Setting screen mode 4 brightness 1.000000
4099	DAC: setting palette
4100	DAC: PAL pixrdmsk readback $ff
4101	DAC2: Setting screen mode 4 brightness 1.000000
4102	DAC2: setting palette
4103	DAC2: PAL pixrdmsk readback $ff
4104	CRTC: setting card pitch (offset between lines)
4105	CRTC: offset register set to: $03a0
4106	CRTC2: setting card pitch (offset between lines)
4107	CRTC2: offset register set to: $03a0
4108	CRTC: setting card RAM to be displayed bpp 32
4109	CRTC: startadd: $00000800
4110	CRTC: frameRAM: $a0000000
4111	CRTC: framebuffer: $a0000800
4112	CRTC2: setting card RAM to be displayed bpp 32
4113	CRTC2: startadd: $00000800
4114	CRTC2: frameRAM: $a0000000
4115	CRTC2: framebuffer: $a0000800
4116	CRTC: setting timing
4117	CRTC: Setting full timing...
4118	CRTC:
4119	HTOT:137
4120	HDISPEND:e7
4121	HBLNKS:e7
4122	HBLNKE:13b
4123	HSYNCS:f4
4124	HSYNCE:110
4125	VTOT:59d
4126	VDISPEND:56f
4127	VBLNKS:56f
4128	VBLNKE:59e
4129	VSYNCS:571
4130	VSYNCE:574
4131	CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b
4132	CRTC2: setting timing
4133	CRTC2: Setting full timing...
4134	CRTC2:
4135	HTOT:137
4136	HDISPEND:e7
4137	HBLNKS:e7
4138	HBLNKE:13b
4139	HSYNCS:f4
4140	HSYNCE:110
4141	VTOT:59d
4142	VDISPEND:56f
4143	VBLNKS:56f
4144	VBLNKE:59e
4145	VSYNCS:571
4146	VSYNCE:574
4147	CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b
4148	ACC_DMA: timer numerator $000014c8, denominator $00000271
4149	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
4150	SET_DPMS_MODE: $00000001
4151	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
4152	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
4153	INIT: RAM access OK.
4154	SETMODE: booted since 442335.982000 mS
4155	Overlay: Not exporting hook B_OVERLAY_COUNT.
4156	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
4157	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
4158	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
4159	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
4160	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
4161	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
4162	Overlay: Not exporting hook B_RELEASE_OVERLAY.
4163	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
4164	GET_EDID_INFO: EDID info not available
4165	GET_EDID_INFO: EDID info not available
4166	GET_EDID_INFO: EDID info not available
4167	GET_EDID_INFO: EDID info not available
4168	Haiku: tunnel access target=swap, command=get, value=0
4169	Haiku: tunnel access target=usepanel, command=get, value=0
4170	Haiku: tunnel access target=tvstandard, command=get, value=0
4171	Haiku: tunnel access target=swap, command=set, value=0
4172	SETMODE: (ENTER) initial modeflags: $0000015f
4173	SETMODE: requested target pixelclock 217857kHz
4174	SETMODE: requested virtual_width 1856, virtual_height 1392
4175	PROPOSEMODE: (ENTER) requested virtual_width 1856, virtual_height 1392
4176	INIT: memory pitch will be set to 1856 pixels for colorspace 0x00000008
4177	DAC: NV4/NV10/NV20 restrictions apply
4178	DAC: pix VCO frequency found 435.714294Mhz
4179	DAC: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01
4180	PROPOSEMODE: validated virtual_width 1856, virtual_height 1392 pixels
4181	PROPOSEMODE: initial modeflags: $0000015f
4182	PROPOSEMODE: validated modeflags: $0000015f
4183	PROPOSEMODE: completed successfully.
4184	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
4185	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
4186	INIT: memory pitch will be set to 1856 pixels for colorspace 0x00000008
4187	SETMODE: setting DUALHEAD mode
4188	INIT: switching CRTC/DAC use to be straight-through
4189	SETMODE: target clock 217857kHz
4190	DAC: NV4/NV10/NV20 restrictions apply
4191	DAC: pix VCO frequency found 435.714294Mhz
4192	DAC: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01
4193	DAC: dumping current pixelPLL settings:
4194	DAC: divider1 settings ($00013d0e): M1=14, N1=61, P1=2
4195	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
4196	DAC: phase discriminator frequency is 1.785714Mhz
4197	DAC: VCO frequency is 435.714294Mhz
4198	DAC: pixelclock is 217.857147Mhz
4199	DAC: end of dump.
4200	DAC: current NV30_PLLSETUP settings: $00000000
4201	DAC: current (0x0000c040) settings: $340bc003
4202	DAC: Setting PIX PLL for pixelclock 217.856995
4203	DAC: PIX PLL frequency should be locked now...
4204	SETMODE: target2 clock 217857kHz
4205	DAC2: NV10/NV20 restrictions apply
4206	DAC2: pix VCO frequency found 435.714294Mhz
4207	DAC2: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01
4208	DAC2: dumping current pixelPLL settings:
4209	DAC2: divider1 settings ($00013d0e): M1=14, N1=61, P1=2
4210	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
4211	DAC2: phase discriminator frequency is 1.785714Mhz
4212	DAC2: VCO frequency is 435.714294Mhz
4213	DAC2: pixelclock is 217.857147Mhz
4214	DAC2: end of dump.
4215	DAC2: current NV30_PLLSETUP settings: $00000000
4216	DAC2: current (0x0000c040) settings: $340bc003
4217	DAC2: Setting PIX PLL for pixelclock 217.856995
4218	DAC2: PIX PLL frequency should be locked now...
4219	DAC: Setting screen mode 4 brightness 1.000000
4220	DAC: setting palette
4221	DAC: PAL pixrdmsk readback $ff
4222	DAC2: Setting screen mode 4 brightness 1.000000
4223	DAC2: setting palette
4224	DAC2: PAL pixrdmsk readback $ff
4225	CRTC: setting card pitch (offset between lines)
4226	CRTC: offset register set to: $03a0
4227	CRTC2: setting card pitch (offset between lines)
4228	CRTC2: offset register set to: $03a0
4229	CRTC: setting card RAM to be displayed bpp 32
4230	CRTC: startadd: $00000800
4231	CRTC: frameRAM: $a0000000
4232	CRTC: framebuffer: $a0000800
4233	CRTC2: setting card RAM to be displayed bpp 32
4234	CRTC2: startadd: $00000800
4235	CRTC2: frameRAM: $a0000000
4236	CRTC2: framebuffer: $a0000800
4237	CRTC: setting timing
4238	CRTC: Setting full timing...
4239	CRTC:
4240	HTOT:137
4241	HDISPEND:e7
4242	HBLNKS:e7
4243	HBLNKE:13b
4244	HSYNCS:f4
4245	HSYNCE:110
4246	VTOT:59d
4247	VDISPEND:56f
4248	VBLNKS:56f
4249	VBLNKE:59e
4250	VSYNCS:571
4251	VSYNCE:574
4252	CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b
4253	CRTC2: setting timing
4254	CRTC2: Setting full timing...
4255	CRTC2:
4256	HTOT:137
4257	HDISPEND:e7
4258	HBLNKS:e7
4259	HBLNKE:13b
4260	HSYNCS:f4
4261	HSYNCE:110
4262	VTOT:59d
4263	VDISPEND:56f
4264	VBLNKS:56f
4265	VBLNKE:59e
4266	VSYNCS:571
4267	VSYNCE:574
4268	CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b
4269	ACC_DMA: timer numerator $000014c8, denominator $00000271
4270	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
4271	SET_DPMS_MODE: $00000001
4272	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
4273	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
4274	INIT: RAM access OK.
4275	SETMODE: booted since 454424.536000 mS
4276	Haiku: tunnel access target=usepanel, command=set, value=0
4277	Haiku: tunnel access target=tvstandard, command=set, value=0
4278	SETMODE: (ENTER) initial modeflags: $0000015f
4279	SETMODE: requested target pixelclock 64996kHz
4280	SETMODE: requested virtual_width 1024, virtual_height 768
4281	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
4282	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
4283	DAC: NV4/NV10/NV20 restrictions apply
4284	DAC: pix VCO frequency found 521.428589Mhz
4285	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4286	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
4287	PROPOSEMODE: initial modeflags: $0000015f
4288	PROPOSEMODE: validated modeflags: $0000015f
4289	PROPOSEMODE: completed successfully.
4290	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
4291	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
4292	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
4293	SETMODE: setting DUALHEAD mode
4294	INIT: switching CRTC/DAC use to be straight-through
4295	SETMODE: target clock 65178kHz
4296	DAC: NV4/NV10/NV20 restrictions apply
4297	DAC: pix VCO frequency found 521.428589Mhz
4298	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4299	DAC: dumping current pixelPLL settings:
4300	DAC: divider1 settings ($00013d0e): M1=14, N1=61, P1=2
4301	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
4302	DAC: phase discriminator frequency is 1.785714Mhz
4303	DAC: VCO frequency is 435.714294Mhz
4304	DAC: pixelclock is 217.857147Mhz
4305	DAC: end of dump.
4306	DAC: current NV30_PLLSETUP settings: $00000000
4307	DAC: current (0x0000c040) settings: $340bc003
4308	DAC: Setting PIX PLL for pixelclock 65.178001
4309	DAC: PIX PLL frequency should be locked now...
4310	SETMODE: target2 clock 65178kHz
4311	DAC2: NV10/NV20 restrictions apply
4312	DAC2: pix VCO frequency found 521.428589Mhz
4313	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4314	DAC2: dumping current pixelPLL settings:
4315	DAC2: divider1 settings ($00013d0e): M1=14, N1=61, P1=2
4316	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
4317	DAC2: phase discriminator frequency is 1.785714Mhz
4318	DAC2: VCO frequency is 435.714294Mhz
4319	DAC2: pixelclock is 217.857147Mhz
4320	DAC2: end of dump.
4321	DAC2: current NV30_PLLSETUP settings: $00000000
4322	DAC2: current (0x0000c040) settings: $340bc003
4323	DAC2: Setting PIX PLL for pixelclock 65.178001
4324	DAC2: PIX PLL frequency should be locked now...
4325	DAC: Setting screen mode 4 brightness 1.000000
4326	DAC: setting palette
4327	DAC: PAL pixrdmsk readback $ff
4328	DAC2: Setting screen mode 4 brightness 1.000000
4329	DAC2: setting palette
4330	DAC2: PAL pixrdmsk readback $ff
4331	CRTC: setting card pitch (offset between lines)
4332	CRTC: offset register set to: $0200
4333	CRTC2: setting card pitch (offset between lines)
4334	CRTC2: offset register set to: $0200
4335	CRTC: setting card RAM to be displayed bpp 32
4336	CRTC: startadd: $00000800
4337	CRTC: frameRAM: $a0000000
4338	CRTC: framebuffer: $a0000800
4339	CRTC2: setting card RAM to be displayed bpp 32
4340	CRTC2: startadd: $00000800
4341	CRTC2: frameRAM: $a0000000
4342	CRTC2: framebuffer: $a0000800
4343	CRTC: setting timing
4344	CRTC: Setting full timing...
4345	CRTC:
4346	HTOT:a3
4347	HDISPEND:7f
4348	HBLNKS:7f
4349	HBLNKE:a7
4350	HSYNCS:83
4351	HSYNCE:94
4352	VTOT:324
4353	VDISPEND:2ff
4354	VBLNKS:2ff
4355	VBLNKE:325
4356	VSYNCS:303
4357	VSYNCE:309
4358	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
4359	CRTC2: setting timing
4360	CRTC2: Setting full timing...
4361	CRTC2:
4362	HTOT:a3
4363	HDISPEND:7f
4364	HBLNKS:7f
4365	HBLNKE:a7
4366	HSYNCS:83
4367	HSYNCE:94
4368	VTOT:324
4369	VDISPEND:2ff
4370	VBLNKS:2ff
4371	VBLNKE:325
4372	VSYNCS:303
4373	VSYNCE:309
4374	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
4375	ACC_DMA: timer numerator $000014c8, denominator $00000271
4376	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
4377	SET_DPMS_MODE: $00000001
4378	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
4379	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
4380	INIT: RAM access OK.
4381	SETMODE: booted since 454459.260000 mS
4382	Overlay: Not exporting hook B_OVERLAY_COUNT.
4383	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
4384	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
4385	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
4386	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
4387	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
4388	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
4389	Overlay: Not exporting hook B_RELEASE_OVERLAY.
4390	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
4391	GET_EDID_INFO: EDID info not available
4392	Haiku: tunnel access target=swap, command=get, value=0
4393	Haiku: tunnel access target=usepanel, command=get, value=0
4394	Haiku: tunnel access target=tvstandard, command=get, value=0
4395	GET_EDID_INFO: EDID info not available
4396	Haiku: tunnel access target=swap, command=get, value=0
4397	Haiku: tunnel access target=usepanel, command=get, value=0
4398	Haiku: tunnel access target=tvstandard, command=get, value=0
4399	GET_EDID_INFO: EDID info not available
4400	Haiku: tunnel access target=swap, command=get, value=0
4401	Haiku: tunnel access target=usepanel, command=get, value=0
4402	Haiku: tunnel access target=tvstandard, command=get, value=0
4403	GET_EDID_INFO: EDID info not available
4404	Haiku: tunnel access target=swap, command=get, value=0
4405	Haiku: tunnel access target=usepanel, command=get, value=0
4406	Haiku: tunnel access target=tvstandard, command=get, value=0
4407	GET_EDID_INFO: EDID info not available
4408	GET_ACCELERANT_DEVICE_INFO: returning info
4409	Haiku: tunnel access target=swap, command=get, value=0
4410	Haiku: tunnel access target=usepanel, command=get, value=0
4411	Haiku: tunnel access target=tvstandard, command=get, value=0
4412	Haiku: tunnel access target=swap, command=get, value=0
4413	Haiku: tunnel access target=usepanel, command=get, value=0
4414	Haiku: tunnel access target=tvstandard, command=get, value=0
4415	GET_EDID_INFO: EDID info not available
4416	GET_EDID_INFO: EDID info not available
4417	Haiku: tunnel access target=swap, command=get, value=0
4418	Haiku: tunnel access target=usepanel, command=get, value=0
4419	Haiku: tunnel access target=tvstandard, command=get, value=0
4420	Haiku: tunnel access target=swap, command=get, value=0
4421	Haiku: tunnel access target=usepanel, command=get, value=0
4422	Haiku: tunnel access target=tvstandard, command=get, value=0
4423	Haiku: tunnel access target=swap, command=get, value=0
4424	Haiku: tunnel access target=usepanel, command=get, value=0
4425	Haiku: tunnel access target=tvstandard, command=get, value=0
4426	Haiku: tunnel access target=swap, command=get, value=0
4427	Haiku: tunnel access target=usepanel, command=get, value=0
4428	Haiku: tunnel access target=tvstandard, command=get, value=0
4429	Haiku: tunnel access target=swap, command=set, value=0
4430	SETMODE: (ENTER) initial modeflags: $0000015f
4431	SETMODE: requested target pixelclock 65178kHz
4432	SETMODE: requested virtual_width 1024, virtual_height 768
4433	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
4434	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
4435	DAC: NV4/NV10/NV20 restrictions apply
4436	DAC: pix VCO frequency found 521.428589Mhz
4437	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4438	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
4439	PROPOSEMODE: initial modeflags: $0000015f
4440	PROPOSEMODE: validated modeflags: $0000015f
4441	PROPOSEMODE: completed successfully.
4442	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
4443	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
4444	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
4445	SETMODE: setting DUALHEAD mode
4446	INIT: switching CRTC/DAC use to be straight-through
4447	SETMODE: target clock 65178kHz
4448	DAC: NV4/NV10/NV20 restrictions apply
4449	DAC: pix VCO frequency found 521.428589Mhz
4450	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4451	DAC: dumping current pixelPLL settings:
4452	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
4453	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
4454	DAC: phase discriminator frequency is 1.785714Mhz
4455	DAC: VCO frequency is 521.428589Mhz
4456	DAC: pixelclock is 65.178574Mhz
4457	DAC: end of dump.
4458	DAC: current NV30_PLLSETUP settings: $00000000
4459	DAC: current (0x0000c040) settings: $340bc003
4460	DAC: Setting PIX PLL for pixelclock 65.178001
4461	DAC: PIX PLL frequency should be locked now...
4462	SETMODE: target2 clock 65178kHz
4463	DAC2: NV10/NV20 restrictions apply
4464	DAC2: pix VCO frequency found 521.428589Mhz
4465	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4466	DAC2: dumping current pixelPLL settings:
4467	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
4468	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
4469	DAC2: phase discriminator frequency is 1.785714Mhz
4470	DAC2: VCO frequency is 521.428589Mhz
4471	DAC2: pixelclock is 65.178574Mhz
4472	DAC2: end of dump.
4473	DAC2: current NV30_PLLSETUP settings: $00000000
4474	DAC2: current (0x0000c040) settings: $340bc003
4475	DAC2: Setting PIX PLL for pixelclock 65.178001
4476	DAC2: PIX PLL frequency should be locked now...
4477	DAC: Setting screen mode 4 brightness 1.000000
4478	DAC: setting palette
4479	DAC: PAL pixrdmsk readback $ff
4480	DAC2: Setting screen mode 4 brightness 1.000000
4481	DAC2: setting palette
4482	DAC2: PAL pixrdmsk readback $ff
4483	CRTC: setting card pitch (offset between lines)
4484	CRTC: offset register set to: $0200
4485	CRTC2: setting card pitch (offset between lines)
4486	CRTC2: offset register set to: $0200
4487	CRTC: setting card RAM to be displayed bpp 32
4488	CRTC: startadd: $00000800
4489	CRTC: frameRAM: $a0000000
4490	CRTC: framebuffer: $a0000800
4491	CRTC2: setting card RAM to be displayed bpp 32
4492	CRTC2: startadd: $00000800
4493	CRTC2: frameRAM: $a0000000
4494	CRTC2: framebuffer: $a0000800
4495	CRTC: setting timing
4496	CRTC: Setting full timing...
4497	CRTC:
4498	HTOT:a3
4499	HDISPEND:7f
4500	HBLNKS:7f
4501	HBLNKE:a7
4502	HSYNCS:83
4503	HSYNCE:94
4504	VTOT:324
4505	VDISPEND:2ff
4506	VBLNKS:2ff
4507	VBLNKE:325
4508	VSYNCS:303
4509	VSYNCE:309
4510	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
4511	CRTC2: setting timing
4512	CRTC2: Setting full timing...
4513	CRTC2:
4514	HTOT:a3
4515	HDISPEND:7f
4516	HBLNKS:7f
4517	HBLNKE:a7
4518	HSYNCS:83
4519	HSYNCE:94
4520	VTOT:324
4521	VDISPEND:2ff
4522	VBLNKS:2ff
4523	VBLNKE:325
4524	VSYNCS:303
4525	VSYNCE:309
4526	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
4527	ACC_DMA: timer numerator $000014c8, denominator $00000271
4528	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
4529	SET_DPMS_MODE: $00000001
4530	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
4531	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
4532	INIT: RAM access OK.
4533	SETMODE: booted since 461806.156000 mS
4534	Haiku: tunnel access target=usepanel, command=set, value=0
4535	Haiku: tunnel access target=tvstandard, command=set, value=0
4536	SETMODE: (ENTER) initial modeflags: $0000015f
4537	SETMODE: requested target pixelclock 234000kHz
4538	SETMODE: requested virtual_width 1920, virtual_height 1440
4539	PROPOSEMODE: (ENTER) requested virtual_width 1920, virtual_height 1440
4540	INIT: memory pitch will be set to 1920 pixels for colorspace 0x00000008
4541	DAC: NV4/NV10/NV20 restrictions apply
4542	DAC: pix VCO frequency found 469.230743Mhz
4543	DAC: pix PLL check: requested 234.000000MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01
4544	PROPOSEMODE: validated virtual_width 1920, virtual_height 1440 pixels
4545	PROPOSEMODE: initial modeflags: $0000015f
4546	PROPOSEMODE: validated modeflags: $0000015f
4547	PROPOSEMODE: completed successfully.
4548	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
4549	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
4550	INIT: memory pitch will be set to 1920 pixels for colorspace 0x00000008
4551	SETMODE: setting DUALHEAD mode
4552	INIT: switching CRTC/DAC use to be straight-through
4553	SETMODE: target clock 234615kHz
4554	DAC: NV4/NV10/NV20 restrictions apply
4555	DAC: pix VCO frequency found 469.230743Mhz
4556	DAC: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01
4557	DAC: dumping current pixelPLL settings:
4558	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
4559	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
4560	DAC: phase discriminator frequency is 1.785714Mhz
4561	DAC: VCO frequency is 521.428589Mhz
4562	DAC: pixelclock is 65.178574Mhz
4563	DAC: end of dump.
4564	DAC: current NV30_PLLSETUP settings: $00000000
4565	DAC: current (0x0000c040) settings: $340bc003
4566	DAC: Setting PIX PLL for pixelclock 234.615005
4567	DAC: PIX PLL frequency should be locked now...
4568	SETMODE: target2 clock 234615kHz
4569	DAC2: NV10/NV20 restrictions apply
4570	DAC2: pix VCO frequency found 469.230743Mhz
4571	DAC2: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01
4572	DAC2: dumping current pixelPLL settings:
4573	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
4574	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
4575	DAC2: phase discriminator frequency is 1.785714Mhz
4576	DAC2: VCO frequency is 521.428589Mhz
4577	DAC2: pixelclock is 65.178574Mhz
4578	DAC2: end of dump.
4579	DAC2: current NV30_PLLSETUP settings: $00000000
4580	DAC2: current (0x0000c040) settings: $340bc003
4581	DAC2: Setting PIX PLL for pixelclock 234.615005
4582	DAC2: PIX PLL frequency should be locked now...
4583	DAC: Setting screen mode 4 brightness 1.000000
4584	DAC: setting palette
4585	DAC: PAL pixrdmsk readback $ff
4586	DAC2: Setting screen mode 4 brightness 1.000000
4587	DAC2: setting palette
4588	DAC2: PAL pixrdmsk readback $ff
4589	CRTC: setting card pitch (offset between lines)
4590	CRTC: offset register set to: $03c0
4591	CRTC2: setting card pitch (offset between lines)
4592	CRTC2: offset register set to: $03c0
4593	CRTC: setting card RAM to be displayed bpp 32
4594	CRTC: startadd: $00000800
4595	CRTC: frameRAM: $a0000000
4596	CRTC: framebuffer: $a0000800
4597	CRTC2: setting card RAM to be displayed bpp 32
4598	CRTC2: startadd: $00000800
4599	CRTC2: frameRAM: $a0000000
4600	CRTC2: framebuffer: $a0000800
4601	CRTC: setting timing
4602	CRTC: Setting full timing...
4603	CRTC:
4604	HTOT:140
4605	HDISPEND:ef
4606	HBLNKS:ef
4607	HBLNKE:144
4608	HSYNCS:100
4609	HSYNCE:11a
4610	VTOT:5da
4611	VDISPEND:59f
4612	VBLNKS:59f
4613	VBLNKE:5db
4614	VSYNCS:5a1
4615	VSYNCE:5a4
4616	CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b
4617	CRTC2: setting timing
4618	CRTC2: Setting full timing...
4619	CRTC2:
4620	HTOT:140
4621	HDISPEND:ef
4622	HBLNKS:ef
4623	HBLNKE:144
4624	HSYNCS:100
4625	HSYNCE:11a
4626	VTOT:5da
4627	VDISPEND:59f
4628	VBLNKS:59f
4629	VBLNKE:5db
4630	VSYNCS:5a1
4631	VSYNCE:5a4
4632	CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b
4633	ACC_DMA: timer numerator $000014c8, denominator $00000271
4634	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
4635	SET_DPMS_MODE: $00000001
4636	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
4637	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
4638	INIT: RAM access OK.
4639	SETMODE: booted since 461821.816000 mS
4640	Overlay: Not exporting hook B_OVERLAY_COUNT.
4641	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
4642	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
4643	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
4644	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
4645	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
4646	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
4647	Overlay: Not exporting hook B_RELEASE_OVERLAY.
4648	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
4649	GET_EDID_INFO: EDID info not available
4650	GET_EDID_INFO: EDID info not available
4651	GET_EDID_INFO: EDID info not available
4652	GET_EDID_INFO: EDID info not available
4653	Haiku: tunnel access target=swap, command=get, value=0
4654	Haiku: tunnel access target=usepanel, command=get, value=0
4655	Haiku: tunnel access target=tvstandard, command=get, value=0
4656	Haiku: tunnel access target=swap, command=set, value=0
4657	SETMODE: (ENTER) initial modeflags: $0000015f
4658	SETMODE: requested target pixelclock 234615kHz
4659	SETMODE: requested virtual_width 1920, virtual_height 1440
4660	PROPOSEMODE: (ENTER) requested virtual_width 1920, virtual_height 1440
4661	INIT: memory pitch will be set to 1920 pixels for colorspace 0x00000008
4662	DAC: NV4/NV10/NV20 restrictions apply
4663	DAC: pix VCO frequency found 469.230743Mhz
4664	DAC: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01
4665	PROPOSEMODE: validated virtual_width 1920, virtual_height 1440 pixels
4666	PROPOSEMODE: initial modeflags: $0000015f
4667	PROPOSEMODE: validated modeflags: $0000015f
4668	PROPOSEMODE: completed successfully.
4669	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
4670	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
4671	INIT: memory pitch will be set to 1920 pixels for colorspace 0x00000008
4672	SETMODE: setting DUALHEAD mode
4673	INIT: switching CRTC/DAC use to be straight-through
4674	SETMODE: target clock 234615kHz
4675	DAC: NV4/NV10/NV20 restrictions apply
4676	DAC: pix VCO frequency found 469.230743Mhz
4677	DAC: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01
4678	DAC: dumping current pixelPLL settings:
4679	DAC: divider1 settings ($00013d0d): M1=13, N1=61, P1=2
4680	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
4681	DAC: phase discriminator frequency is 1.923077Mhz
4682	DAC: VCO frequency is 469.230743Mhz
4683	DAC: pixelclock is 234.615372Mhz
4684	DAC: end of dump.
4685	DAC: current NV30_PLLSETUP settings: $00000000
4686	DAC: current (0x0000c040) settings: $340bc003
4687	DAC: Setting PIX PLL for pixelclock 234.615005
4688	DAC: PIX PLL frequency should be locked now...
4689	SETMODE: target2 clock 234615kHz
4690	DAC2: NV10/NV20 restrictions apply
4691	DAC2: pix VCO frequency found 469.230743Mhz
4692	DAC2: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01
4693	DAC2: dumping current pixelPLL settings:
4694	DAC2: divider1 settings ($00013d0d): M1=13, N1=61, P1=2
4695	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
4696	DAC2: phase discriminator frequency is 1.923077Mhz
4697	DAC2: VCO frequency is 469.230743Mhz
4698	DAC2: pixelclock is 234.615372Mhz
4699	DAC2: end of dump.
4700	DAC2: current NV30_PLLSETUP settings: $00000000
4701	DAC2: current (0x0000c040) settings: $340bc003
4702	DAC2: Setting PIX PLL for pixelclock 234.615005
4703	DAC2: PIX PLL frequency should be locked now...
4704	DAC: Setting screen mode 4 brightness 1.000000
4705	DAC: setting palette
4706	DAC: PAL pixrdmsk readback $ff
4707	DAC2: Setting screen mode 4 brightness 1.000000
4708	DAC2: setting palette
4709	DAC2: PAL pixrdmsk readback $ff
4710	CRTC: setting card pitch (offset between lines)
4711	CRTC: offset register set to: $03c0
4712	CRTC2: setting card pitch (offset between lines)
4713	CRTC2: offset register set to: $03c0
4714	CRTC: setting card RAM to be displayed bpp 32
4715	CRTC: startadd: $00000800
4716	CRTC: frameRAM: $a0000000
4717	CRTC: framebuffer: $a0000800
4718	CRTC2: setting card RAM to be displayed bpp 32
4719	CRTC2: startadd: $00000800
4720	CRTC2: frameRAM: $a0000000
4721	CRTC2: framebuffer: $a0000800
4722	CRTC: setting timing
4723	CRTC: Setting full timing...
4724	CRTC:
4725	HTOT:140
4726	HDISPEND:ef
4727	HBLNKS:ef
4728	HBLNKE:144
4729	HSYNCS:100
4730	HSYNCE:11a
4731	VTOT:5da
4732	VDISPEND:59f
4733	VBLNKS:59f
4734	VBLNKE:5db
4735	VSYNCS:5a1
4736	VSYNCE:5a4
4737	CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b
4738	CRTC2: setting timing
4739	CRTC2: Setting full timing...
4740	CRTC2:
4741	HTOT:140
4742	HDISPEND:ef
4743	HBLNKS:ef
4744	HBLNKE:144
4745	HSYNCS:100
4746	HSYNCE:11a
4747	VTOT:5da
4748	VDISPEND:59f
4749	VBLNKS:59f
4750	VBLNKE:5db
4751	VSYNCS:5a1
4752	VSYNCE:5a4
4753	CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b
4754	ACC_DMA: timer numerator $000014c8, denominator $00000271
4755	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
4756	SET_DPMS_MODE: $00000001
4757	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
4758	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
4759	INIT: RAM access OK.
4760	SETMODE: booted since 473905.632000 mS
4761	Haiku: tunnel access target=usepanel, command=set, value=0
4762	Haiku: tunnel access target=tvstandard, command=set, value=0
4763	SETMODE: (ENTER) initial modeflags: $0000015f
4764	SETMODE: requested target pixelclock 64996kHz
4765	SETMODE: requested virtual_width 1024, virtual_height 768
4766	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
4767	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
4768	DAC: NV4/NV10/NV20 restrictions apply
4769	DAC: pix VCO frequency found 521.428589Mhz
4770	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4771	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
4772	PROPOSEMODE: initial modeflags: $0000015f
4773	PROPOSEMODE: validated modeflags: $0000015f
4774	PROPOSEMODE: completed successfully.
4775	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
4776	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
4777	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
4778	SETMODE: setting DUALHEAD mode
4779	INIT: switching CRTC/DAC use to be straight-through
4780	SETMODE: target clock 65178kHz
4781	DAC: NV4/NV10/NV20 restrictions apply
4782	DAC: pix VCO frequency found 521.428589Mhz
4783	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4784	DAC: dumping current pixelPLL settings:
4785	DAC: divider1 settings ($00013d0d): M1=13, N1=61, P1=2
4786	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
4787	DAC: phase discriminator frequency is 1.923077Mhz
4788	DAC: VCO frequency is 469.230743Mhz
4789	DAC: pixelclock is 234.615372Mhz
4790	DAC: end of dump.
4791	DAC: current NV30_PLLSETUP settings: $00000000
4792	DAC: current (0x0000c040) settings: $340bc003
4793	DAC: Setting PIX PLL for pixelclock 65.178001
4794	DAC: PIX PLL frequency should be locked now...
4795	SETMODE: target2 clock 65178kHz
4796	DAC2: NV10/NV20 restrictions apply
4797	DAC2: pix VCO frequency found 521.428589Mhz
4798	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4799	DAC2: dumping current pixelPLL settings:
4800	DAC2: divider1 settings ($00013d0d): M1=13, N1=61, P1=2
4801	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
4802	DAC2: phase discriminator frequency is 1.923077Mhz
4803	DAC2: VCO frequency is 469.230743Mhz
4804	DAC2: pixelclock is 234.615372Mhz
4805	DAC2: end of dump.
4806	DAC2: current NV30_PLLSETUP settings: $00000000
4807	DAC2: current (0x0000c040) settings: $340bc003
4808	DAC2: Setting PIX PLL for pixelclock 65.178001
4809	DAC2: PIX PLL frequency should be locked now...
4810	DAC: Setting screen mode 4 brightness 1.000000
4811	DAC: setting palette
4812	DAC: PAL pixrdmsk readback $ff
4813	DAC2: Setting screen mode 4 brightness 1.000000
4814	DAC2: setting palette
4815	DAC2: PAL pixrdmsk readback $ff
4816	CRTC: setting card pitch (offset between lines)
4817	CRTC: offset register set to: $0200
4818	CRTC2: setting card pitch (offset between lines)
4819	CRTC2: offset register set to: $0200
4820	CRTC: setting card RAM to be displayed bpp 32
4821	CRTC: startadd: $00000800
4822	CRTC: frameRAM: $a0000000
4823	CRTC: framebuffer: $a0000800
4824	CRTC2: setting card RAM to be displayed bpp 32
4825	CRTC2: startadd: $00000800
4826	CRTC2: frameRAM: $a0000000
4827	CRTC2: framebuffer: $a0000800
4828	CRTC: setting timing
4829	CRTC: Setting full timing...
4830	CRTC:
4831	HTOT:a3
4832	HDISPEND:7f
4833	HBLNKS:7f
4834	HBLNKE:a7
4835	HSYNCS:83
4836	HSYNCE:94
4837	VTOT:324
4838	VDISPEND:2ff
4839	VBLNKS:2ff
4840	VBLNKE:325
4841	VSYNCS:303
4842	VSYNCE:309
4843	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
4844	CRTC2: setting timing
4845	CRTC2: Setting full timing...
4846	CRTC2:
4847	HTOT:a3
4848	HDISPEND:7f
4849	HBLNKS:7f
4850	HBLNKE:a7
4851	HSYNCS:83
4852	HSYNCE:94
4853	VTOT:324
4854	VDISPEND:2ff
4855	VBLNKS:2ff
4856	VBLNKE:325
4857	VSYNCS:303
4858	VSYNCE:309
4859	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
4860	ACC_DMA: timer numerator $000014c8, denominator $00000271
4861	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
4862	SET_DPMS_MODE: $00000001
4863	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
4864	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
4865	INIT: RAM access OK.
4866	SETMODE: booted since 473942.354000 mS
4867	Overlay: Not exporting hook B_OVERLAY_COUNT.
4868	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
4869	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
4870	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
4871	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
4872	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
4873	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
4874	Overlay: Not exporting hook B_RELEASE_OVERLAY.
4875	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
4876	GET_EDID_INFO: EDID info not available
4877	Haiku: tunnel access target=swap, command=get, value=0
4878	Haiku: tunnel access target=usepanel, command=get, value=0
4879	Haiku: tunnel access target=tvstandard, command=get, value=0
4880	GET_EDID_INFO: EDID info not available
4881	Haiku: tunnel access target=swap, command=get, value=0
4882	Haiku: tunnel access target=usepanel, command=get, value=0
4883	Haiku: tunnel access target=tvstandard, command=get, value=0
4884	GET_EDID_INFO: EDID info not available
4885	Haiku: tunnel access target=swap, command=get, value=0
4886	Haiku: tunnel access target=usepanel, command=get, value=0
4887	Haiku: tunnel access target=tvstandard, command=get, value=0
4888	GET_EDID_INFO: EDID info not available
4889	Haiku: tunnel access target=swap, command=get, value=0
4890	Haiku: tunnel access target=usepanel, command=get, value=0
4891	Haiku: tunnel access target=tvstandard, command=get, value=0
4892	GET_EDID_INFO: EDID info not available
4893	GET_ACCELERANT_DEVICE_INFO: returning info
4894	Haiku: tunnel access target=swap, command=get, value=0
4895	Haiku: tunnel access target=usepanel, command=get, value=0
4896	Haiku: tunnel access target=tvstandard, command=get, value=0
4897	Haiku: tunnel access target=swap, command=get, value=0
4898	Haiku: tunnel access target=usepanel, command=get, value=0
4899	Haiku: tunnel access target=tvstandard, command=get, value=0
4900	GET_EDID_INFO: EDID info not available
4901	GET_EDID_INFO: EDID info not available
4902	Haiku: tunnel access target=swap, command=get, value=0
4903	Haiku: tunnel access target=usepanel, command=get, value=0
4904	Haiku: tunnel access target=tvstandard, command=get, value=0
4905	Haiku: tunnel access target=swap, command=get, value=0
4906	Haiku: tunnel access target=usepanel, command=get, value=0
4907	Haiku: tunnel access target=tvstandard, command=get, value=0
4908	Haiku: tunnel access target=swap, command=get, value=0
4909	Haiku: tunnel access target=usepanel, command=get, value=0
4910	Haiku: tunnel access target=tvstandard, command=get, value=0
4911	Haiku: tunnel access target=swap, command=get, value=0
4912	Haiku: tunnel access target=usepanel, command=get, value=0
4913	Haiku: tunnel access target=tvstandard, command=get, value=0
4914	Haiku: tunnel access target=swap, command=set, value=0
4915	SETMODE: (ENTER) initial modeflags: $0000015f
4916	SETMODE: requested target pixelclock 65178kHz
4917	SETMODE: requested virtual_width 1024, virtual_height 768
4918	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
4919	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
4920	DAC: NV4/NV10/NV20 restrictions apply
4921	DAC: pix VCO frequency found 521.428589Mhz
4922	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4923	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
4924	PROPOSEMODE: initial modeflags: $0000015f
4925	PROPOSEMODE: validated modeflags: $0000015f
4926	PROPOSEMODE: completed successfully.
4927	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
4928	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
4929	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
4930	SETMODE: setting DUALHEAD mode
4931	INIT: switching CRTC/DAC use to be straight-through
4932	SETMODE: target clock 65178kHz
4933	DAC: NV4/NV10/NV20 restrictions apply
4934	DAC: pix VCO frequency found 521.428589Mhz
4935	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4936	DAC: dumping current pixelPLL settings:
4937	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
4938	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
4939	DAC: phase discriminator frequency is 1.785714Mhz
4940	DAC: VCO frequency is 521.428589Mhz
4941	DAC: pixelclock is 65.178574Mhz
4942	DAC: end of dump.
4943	DAC: current NV30_PLLSETUP settings: $00000000
4944	DAC: current (0x0000c040) settings: $340bc003
4945	DAC: Setting PIX PLL for pixelclock 65.178001
4946	DAC: PIX PLL frequency should be locked now...
4947	SETMODE: target2 clock 65178kHz
4948	DAC2: NV10/NV20 restrictions apply
4949	DAC2: pix VCO frequency found 521.428589Mhz
4950	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
4951	DAC2: dumping current pixelPLL settings:
4952	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
4953	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
4954	DAC2: phase discriminator frequency is 1.785714Mhz
4955	DAC2: VCO frequency is 521.428589Mhz
4956	DAC2: pixelclock is 65.178574Mhz
4957	DAC2: end of dump.
4958	DAC2: current NV30_PLLSETUP settings: $00000000
4959	DAC2: current (0x0000c040) settings: $340bc003
4960	DAC2: Setting PIX PLL for pixelclock 65.178001
4961	DAC2: PIX PLL frequency should be locked now...
4962	DAC: Setting screen mode 4 brightness 1.000000
4963	DAC: setting palette
4964	DAC: PAL pixrdmsk readback $ff
4965	DAC2: Setting screen mode 4 brightness 1.000000
4966	DAC2: setting palette
4967	DAC2: PAL pixrdmsk readback $ff
4968	CRTC: setting card pitch (offset between lines)
4969	CRTC: offset register set to: $0200
4970	CRTC2: setting card pitch (offset between lines)
4971	CRTC2: offset register set to: $0200
4972	CRTC: setting card RAM to be displayed bpp 32
4973	CRTC: startadd: $00000800
4974	CRTC: frameRAM: $a0000000
4975	CRTC: framebuffer: $a0000800
4976	CRTC2: setting card RAM to be displayed bpp 32
4977	CRTC2: startadd: $00000800
4978	CRTC2: frameRAM: $a0000000
4979	CRTC2: framebuffer: $a0000800
4980	CRTC: setting timing
4981	CRTC: Setting full timing...
4982	CRTC:
4983	HTOT:a3
4984	HDISPEND:7f
4985	HBLNKS:7f
4986	HBLNKE:a7
4987	HSYNCS:83
4988	HSYNCE:94
4989	VTOT:324
4990	VDISPEND:2ff
4991	VBLNKS:2ff
4992	VBLNKE:325
4993	VSYNCS:303
4994	VSYNCE:309
4995	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
4996	CRTC2: setting timing
4997	CRTC2: Setting full timing...
4998	CRTC2:
4999	HTOT:a3
5000	HDISPEND:7f
5001	HBLNKS:7f
5002	HBLNKE:a7
5003	HSYNCS:83
5004	HSYNCE:94
5005	VTOT:324
5006	VDISPEND:2ff
5007	VBLNKS:2ff
5008	VBLNKE:325
5009	VSYNCS:303
5010	VSYNCE:309
5011	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
5012	ACC_DMA: timer numerator $000014c8, denominator $00000271
5013	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
5014	SET_DPMS_MODE: $00000001
5015	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
5016	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
5017	INIT: RAM access OK.
5018	SETMODE: booted since 480740.675000 mS
5019	Haiku: tunnel access target=usepanel, command=set, value=0
5020	Haiku: tunnel access target=tvstandard, command=set, value=0
5021	SETMODE: (ENTER) initial modeflags: $0000015f
5022	SETMODE: requested target pixelclock 266952kHz
5023	SETMODE: requested virtual_width 2048, virtual_height 1536
5024	PROPOSEMODE: (ENTER) requested virtual_width 2048, virtual_height 1536
5025	INIT: memory pitch will be set to 2048 pixels for colorspace 0x00000005
5026	DAC: NV4/NV10/NV20 restrictions apply
5027	DAC: pix VCO frequency found 535.714294Mhz
5028	DAC: pix PLL check: requested 266.951996MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01
5029	PROPOSEMODE: validated virtual_width 2048, virtual_height 1536 pixels
5030	PROPOSEMODE: initial modeflags: $0000015f
5031	PROPOSEMODE: validated modeflags: $0000015f
5032	PROPOSEMODE: completed successfully.
5033	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
5034	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
5035	INIT: memory pitch will be set to 2048 pixels for colorspace 0x00000005
5036	SETMODE: setting DUALHEAD mode
5037	INIT: switching CRTC/DAC use to be straight-through
5038	SETMODE: target clock 267857kHz
5039	DAC: NV4/NV10/NV20 restrictions apply
5040	DAC: pix VCO frequency found 535.714294Mhz
5041	DAC: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01
5042	DAC: dumping current pixelPLL settings:
5043	DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8
5044	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
5045	DAC: phase discriminator frequency is 1.785714Mhz
5046	DAC: VCO frequency is 521.428589Mhz
5047	DAC: pixelclock is 65.178574Mhz
5048	DAC: end of dump.
5049	DAC: current NV30_PLLSETUP settings: $00000000
5050	DAC: current (0x0000c040) settings: $340bc003
5051	DAC: Setting PIX PLL for pixelclock 267.856995
5052	DAC: PIX PLL frequency should be locked now...
5053	SETMODE: target2 clock 267857kHz
5054	DAC2: NV10/NV20 restrictions apply
5055	DAC2: pix VCO frequency found 535.714294Mhz
5056	DAC2: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01
5057	DAC2: dumping current pixelPLL settings:
5058	DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8
5059	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
5060	DAC2: phase discriminator frequency is 1.785714Mhz
5061	DAC2: VCO frequency is 521.428589Mhz
5062	DAC2: pixelclock is 65.178574Mhz
5063	DAC2: end of dump.
5064	DAC2: current NV30_PLLSETUP settings: $00000000
5065	DAC2: current (0x0000c040) settings: $340bc003
5066	DAC2: Setting PIX PLL for pixelclock 267.856995
5067	DAC2: PIX PLL frequency should be locked now...
5068	DAC: Setting screen mode 2 brightness 1.000000
5069	DAC: setting palette
5070	DAC: PAL pixrdmsk readback $ff
5071	DAC2: Setting screen mode 2 brightness 1.000000
5072	DAC2: setting palette
5073	DAC2: PAL pixrdmsk readback $ff
5074	CRTC: setting card pitch (offset between lines)
5075	CRTC: offset register set to: $0200
5076	CRTC2: setting card pitch (offset between lines)
5077	CRTC2: offset register set to: $0200
5078	CRTC: setting card RAM to be displayed bpp 16
5079	CRTC: startadd: $00000800
5080	CRTC: frameRAM: $a0000000
5081	CRTC: framebuffer: $a0000800
5082	CRTC2: setting card RAM to be displayed bpp 16
5083	CRTC2: startadd: $00000800
5084	CRTC2: frameRAM: $a0000000
5085	CRTC2: framebuffer: $a0000800
5086	CRTC: setting timing
5087	CRTC: Setting full timing...
5088	CRTC:
5089	HTOT:159
5090	HDISPEND:ff
5091	HBLNKS:ff
5092	HBLNKE:15d
5093	HSYNCS:113
5094	HSYNCE:12f
5095	VTOT:633
5096	VDISPEND:5ff
5097	VBLNKS:5ff
5098	VBLNKE:634
5099	VSYNCS:601
5100	VSYNCE:604
5101	CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b
5102	CRTC2: setting timing
5103	CRTC2: Setting full timing...
5104	CRTC2:
5105	HTOT:159
5106	HDISPEND:ff
5107	HBLNKS:ff
5108	HBLNKE:15d
5109	HSYNCS:113
5110	HSYNCE:12f
5111	VTOT:633
5112	VDISPEND:5ff
5113	VBLNKS:5ff
5114	VBLNKE:634
5115	VSYNCS:601
5116	VSYNCE:604
5117	CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b
5118	ACC_DMA: timer numerator $000014c8, denominator $00000271
5119	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
5120	SET_DPMS_MODE: $00000001
5121	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
5122	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
5123	INIT: RAM access OK.
5124	SETMODE: booted since 480755.481000 mS
5125	Overlay: Not exporting hook B_OVERLAY_COUNT.
5126	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
5127	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
5128	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
5129	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
5130	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
5131	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
5132	Overlay: Not exporting hook B_RELEASE_OVERLAY.
5133	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
5134	GET_EDID_INFO: EDID info not available
5135	GET_EDID_INFO: EDID info not available
5136	GET_EDID_INFO: EDID info not available
5137	GET_EDID_INFO: EDID info not available
5138	Haiku: tunnel access target=swap, command=get, value=0
5139	Haiku: tunnel access target=usepanel, command=get, value=0
5140	Haiku: tunnel access target=tvstandard, command=get, value=0
5141	Haiku: tunnel access target=swap, command=set, value=0
5142	SETMODE: (ENTER) initial modeflags: $0000015f
5143	SETMODE: requested target pixelclock 267857kHz
5144	SETMODE: requested virtual_width 2048, virtual_height 1536
5145	PROPOSEMODE: (ENTER) requested virtual_width 2048, virtual_height 1536
5146	INIT: memory pitch will be set to 2048 pixels for colorspace 0x00000005
5147	DAC: NV4/NV10/NV20 restrictions apply
5148	DAC: pix VCO frequency found 535.714294Mhz
5149	DAC: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01
5150	PROPOSEMODE: validated virtual_width 2048, virtual_height 1536 pixels
5151	PROPOSEMODE: initial modeflags: $0000015f
5152	PROPOSEMODE: validated modeflags: $0000015f
5153	PROPOSEMODE: completed successfully.
5154	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
5155	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
5156	INIT: memory pitch will be set to 2048 pixels for colorspace 0x00000005
5157	SETMODE: setting DUALHEAD mode
5158	INIT: switching CRTC/DAC use to be straight-through
5159	SETMODE: target clock 267857kHz
5160	DAC: NV4/NV10/NV20 restrictions apply
5161	DAC: pix VCO frequency found 535.714294Mhz
5162	DAC: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01
5163	DAC: dumping current pixelPLL settings:
5164	DAC: divider1 settings ($00014b0e): M1=14, N1=75, P1=2
5165	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
5166	DAC: phase discriminator frequency is 1.785714Mhz
5167	DAC: VCO frequency is 535.714294Mhz
5168	DAC: pixelclock is 267.857147Mhz
5169	DAC: end of dump.
5170	DAC: current NV30_PLLSETUP settings: $00000000
5171	DAC: current (0x0000c040) settings: $340bc003
5172	DAC: Setting PIX PLL for pixelclock 267.856995
5173	DAC: PIX PLL frequency should be locked now...
5174	SETMODE: target2 clock 267857kHz
5175	DAC2: NV10/NV20 restrictions apply
5176	DAC2: pix VCO frequency found 535.714294Mhz
5177	DAC2: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01
5178	DAC2: dumping current pixelPLL settings:
5179	DAC2: divider1 settings ($00014b0e): M1=14, N1=75, P1=2
5180	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
5181	DAC2: phase discriminator frequency is 1.785714Mhz
5182	DAC2: VCO frequency is 535.714294Mhz
5183	DAC2: pixelclock is 267.857147Mhz
5184	DAC2: end of dump.
5185	DAC2: current NV30_PLLSETUP settings: $00000000
5186	DAC2: current (0x0000c040) settings: $340bc003
5187	DAC2: Setting PIX PLL for pixelclock 267.856995
5188	DAC2: PIX PLL frequency should be locked now...
5189	DAC: Setting screen mode 2 brightness 1.000000
5190	DAC: setting palette
5191	DAC: PAL pixrdmsk readback $ff
5192	DAC2: Setting screen mode 2 brightness 1.000000
5193	DAC2: setting palette
5194	DAC2: PAL pixrdmsk readback $ff
5195	CRTC: setting card pitch (offset between lines)
5196	CRTC: offset register set to: $0200
5197	CRTC2: setting card pitch (offset between lines)
5198	CRTC2: offset register set to: $0200
5199	CRTC: setting card RAM to be displayed bpp 16
5200	CRTC: startadd: $00000800
5201	CRTC: frameRAM: $a0000000
5202	CRTC: framebuffer: $a0000800
5203	CRTC2: setting card RAM to be displayed bpp 16
5204	CRTC2: startadd: $00000800
5205	CRTC2: frameRAM: $a0000000
5206	CRTC2: framebuffer: $a0000800
5207	CRTC: setting timing
5208	CRTC: Setting full timing...
5209	CRTC:
5210	HTOT:159
5211	HDISPEND:ff
5212	HBLNKS:ff
5213	HBLNKE:15d
5214	HSYNCS:113
5215	HSYNCE:12f
5216	VTOT:633
5217	VDISPEND:5ff
5218	VBLNKS:5ff
5219	VBLNKE:634
5220	VSYNCS:601
5221	VSYNCE:604
5222	CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b
5223	CRTC2: setting timing
5224	CRTC2: Setting full timing...
5225	CRTC2:
5226	HTOT:159
5227	HDISPEND:ff
5228	HBLNKS:ff
5229	HBLNKE:15d
5230	HSYNCS:113
5231	HSYNCE:12f
5232	VTOT:633
5233	VDISPEND:5ff
5234	VBLNKS:5ff
5235	VBLNKE:634
5236	VSYNCS:601
5237	VSYNCE:604
5238	CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b
5239	ACC_DMA: timer numerator $000014c8, denominator $00000271
5240	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
5241	SET_DPMS_MODE: $00000001
5242	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
5243	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
5244	INIT: RAM access OK.
5245	SETMODE: booted since 492846.611000 mS
5246	Haiku: tunnel access target=usepanel, command=set, value=0
5247	Haiku: tunnel access target=tvstandard, command=set, value=0
5248	SETMODE: (ENTER) initial modeflags: $0000015f
5249	SETMODE: requested target pixelclock 64996kHz
5250	SETMODE: requested virtual_width 1024, virtual_height 768
5251	PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768
5252	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
5253	DAC: NV4/NV10/NV20 restrictions apply
5254	DAC: pix VCO frequency found 521.428589Mhz
5255	DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
5256	PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels
5257	PROPOSEMODE: initial modeflags: $0000015f
5258	PROPOSEMODE: validated modeflags: $0000015f
5259	PROPOSEMODE: completed successfully.
5260	CRTC: setting DPMS: display off, hsync disabled, vsync disabled
5261	CRTC2: setting DPMS: display off, hsync disabled, vsync disabled
5262	INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008
5263	SETMODE: setting DUALHEAD mode
5264	INIT: switching CRTC/DAC use to be straight-through
5265	SETMODE: target clock 65178kHz
5266	DAC: NV4/NV10/NV20 restrictions apply
5267	DAC: pix VCO frequency found 521.428589Mhz
5268	DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
5269	DAC: dumping current pixelPLL settings:
5270	DAC: divider1 settings ($00014b0e): M1=14, N1=75, P1=2
5271	DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4
5272	DAC: phase discriminator frequency is 1.785714Mhz
5273	DAC: VCO frequency is 535.714294Mhz
5274	DAC: pixelclock is 267.857147Mhz
5275	DAC: end of dump.
5276	DAC: current NV30_PLLSETUP settings: $00000000
5277	DAC: current (0x0000c040) settings: $340bc003
5278	DAC: Setting PIX PLL for pixelclock 65.178001
5279	DAC: PIX PLL frequency should be locked now...
5280	SETMODE: target2 clock 65178kHz
5281	DAC2: NV10/NV20 restrictions apply
5282	DAC2: pix VCO frequency found 521.428589Mhz
5283	DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03
5284	DAC2: dumping current pixelPLL settings:
5285	DAC2: divider1 settings ($00014b0e): M1=14, N1=75, P1=2
5286	DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4
5287	DAC2: phase discriminator frequency is 1.785714Mhz
5288	DAC2: VCO frequency is 535.714294Mhz
5289	DAC2: pixelclock is 267.857147Mhz
5290	DAC2: end of dump.
5291	DAC2: current NV30_PLLSETUP settings: $00000000
5292	DAC2: current (0x0000c040) settings: $340bc003
5293	DAC2: Setting PIX PLL for pixelclock 65.178001
5294	DAC2: PIX PLL frequency should be locked now...
5295	DAC: Setting screen mode 4 brightness 1.000000
5296	DAC: setting palette
5297	DAC: PAL pixrdmsk readback $ff
5298	DAC2: Setting screen mode 4 brightness 1.000000
5299	DAC2: setting palette
5300	DAC2: PAL pixrdmsk readback $ff
5301	CRTC: setting card pitch (offset between lines)
5302	CRTC: offset register set to: $0200
5303	CRTC2: setting card pitch (offset between lines)
5304	CRTC2: offset register set to: $0200
5305	CRTC: setting card RAM to be displayed bpp 32
5306	CRTC: startadd: $00000800
5307	CRTC: frameRAM: $a0000000
5308	CRTC: framebuffer: $a0000800
5309	CRTC2: setting card RAM to be displayed bpp 32
5310	CRTC2: startadd: $00000800
5311	CRTC2: frameRAM: $a0000000
5312	CRTC2: framebuffer: $a0000800
5313	CRTC: setting timing
5314	CRTC: Setting full timing...
5315	CRTC:
5316	HTOT:a3
5317	HDISPEND:7f
5318	HBLNKS:7f
5319	HBLNKE:a7
5320	HSYNCS:83
5321	HSYNCE:94
5322	VTOT:324
5323	VDISPEND:2ff
5324	VBLNKS:2ff
5325	VBLNKE:325
5326	VSYNCS:303
5327	VSYNCE:309
5328	CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb
5329	CRTC2: setting timing
5330	CRTC2: Setting full timing...
5331	CRTC2:
5332	HTOT:a3
5333	HDISPEND:7f
5334	HBLNKS:7f
5335	HBLNKE:a7
5336	HSYNCS:83
5337	HSYNCE:94
5338	VTOT:324
5339	VDISPEND:2ff
5340	VBLNKS:2ff
5341	VBLNKE:325
5342	VSYNCS:303
5343	VSYNCE:309
5344	CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb
5345	ACC_DMA: timer numerator $000014c8, denominator $00000271
5346	ACC_DMA: command buffer is at adress $0xffffffffa3ff8000
5347	SET_DPMS_MODE: $00000001
5348	CRTC: setting DPMS: display on, hsync enabled, vsync enabled
5349	CRTC2: setting DPMS: display on, hsync enabled, vsync enabled
5350	INIT: RAM access OK.
5351	SETMODE: booted since 492886.989000 mS
5352	Overlay: Not exporting hook B_OVERLAY_COUNT.
5353	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES.
5354	Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES.
5355	Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER.
5356	Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER.
5357	Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS.
5358	Overlay: Not exporting hook B_ALLOCATE_OVERLAY.
5359	Overlay: Not exporting hook B_RELEASE_OVERLAY.
5360	Overlay: Not exporting hook B_CONFIGURE_OVERLAY.
5361	GET_EDID_INFO: EDID info not available
5362	Haiku: tunnel access target=swap, command=get, value=0
5363	Haiku: tunnel access target=usepanel, command=get, value=0
5364	Haiku: tunnel access target=tvstandard, command=get, value=0
5365	GET_EDID_INFO: EDID info not available
5366	Haiku: tunnel access target=swap, command=get, value=0
5367	Haiku: tunnel access target=usepanel, command=get, value=0
5368	Haiku: tunnel access target=tvstandard, command=get, value=0
5369	GET_EDID_INFO: EDID info not available
5370	Haiku: tunnel access target=swap, command=get, value=0
5371	Haiku: tunnel access target=usepanel, command=get, value=0
5372	Haiku: tunnel access target=tvstandard, command=get, value=0
5373	GET_EDID_INFO: EDID info not available
5374	Haiku: tunnel access target=swap, command=get, value=0
5375	Haiku: tunnel access target=usepanel, command=get, value=0
5376	Haiku: tunnel access target=tvstandard, command=get, value=0
5377	GET_EDID_INFO: EDID info not available
5378	GET_ACCELERANT_DEVICE_INFO: returning info
5379	Haiku: tunnel access target=swap, command=get, value=0
5380	Haiku: tunnel access target=usepanel, command=get, value=0
5381	Haiku: tunnel access target=tvstandard, command=get, value=0
5382	Haiku: tunnel access target=swap, command=get, value=0
5383	Haiku: tunnel access target=usepanel, command=get, value=0
5384	Haiku: tunnel access target=tvstandard, command=get, value=0
5385	GET_EDID_INFO: EDID info not available
5386	Haiku: tunnel access target=swap, command=get, value=0
5387	Haiku: tunnel access target=usepanel, command=get, value=0
5388	Haiku: tunnel access target=tvstandard, command=get, value=0

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