Ticket #17459: ivybridge_0166_mint_dump.txt

File ivybridge_0166_mint_dump.txt, 16.6 KB (added by modeenf, 3 years ago)
Line 
1 CPU_VGACNTRL (0x00041000): 0x80000000 (disabled)
2 PORT_DBG (0x00042308): 0x00007007 (HW DRRS off)
3 DIGITAL_PORT_HOTPLUG_CNTRL (0x00044030): 0x00000010
4 FDI_PLL_BIOS_0 (0x00046000): 0x00000000
5 FDI_PLL_BIOS_1 (0x00046004): 0x00000000
6 FDI_PLL_BIOS_2 (0x00046008): 0x00000000
7 DISPLAY_PORT_PLL_BIOS_0 (0x0004600c): 0x00000000
8 DISPLAY_PORT_PLL_BIOS_1 (0x00046010): 0x00000000
9 DISPLAY_PORT_PLL_BIOS_2 (0x00046014): 0x00000000
10 FDI_PLL_FREQ_CTL (0x00046030): 0x00000000
11 BLC_PWM_CPU_CTL2 (0x00048250): 0x80000000 (enable 1, pipe A)
12 BLC_PWM_CPU_CTL (0x00048254): 0x00001312 (cycle 4882)
13 HTOTAL_A (0x00060000): 0x05bd0555 (1366 active, 1470 total)
14 HBLANK_A (0x00060004): 0x05bd0555 (1366 start, 1470 end)
15 HSYNC_A (0x00060008): 0x05950575 (1398 start, 1430 end)
16 VTOTAL_A (0x0006000c): 0x031102ff (768 active, 786 total)
17 VBLANK_A (0x00060010): 0x031102ff (768 start, 786 end)
18 VSYNC_A (0x00060014): 0x03070302 (771 start, 776 end)
19 PIPEASRC (0x0006001c): 0x055502ff (1366, 768)
20 VSYNCSHIFT_A (0x00060028): 0x00000000
21 PIPEA_DATA_M1 (0x00060030): 0x7e24f5c2 (TU 64, val 0x24f5c2 2422210)
22 PIPEA_DATA_N1 (0x00060034): 0x00400000 (val 0x400000 4194304)
23 PIPEA_DATA_M2 (0x00060038): 0x00000000 (TU 1, val 0x0 0)
24 PIPEA_DATA_N2 (0x0006003c): 0x00000000 (val 0x0 0)
25 PIPEA_LINK_M1 (0x00060040): 0x00020da7 (val 0x20da7 134567)
26 PIPEA_LINK_N1 (0x00060044): 0x00080000 (val 0x80000 524288)
27 PIPEA_LINK_M2 (0x00060048): 0x00000000 (val 0x0 0)
28 PIPEA_LINK_N2 (0x0006004c): 0x00000000 (val 0x0 0)
29 FDI_TXA_CTL (0x00060100): 0x80044b00 (enable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
30 HTOTAL_B (0x00061000): 0x00000000 (1 active, 1 total)
31 HBLANK_B (0x00061004): 0x00000000 (1 start, 1 end)
32 HSYNC_B (0x00061008): 0x00000000 (1 start, 1 end)
33 VTOTAL_B (0x0006100c): 0x00000000 (1 active, 1 total)
34 VBLANK_B (0x00061010): 0x00000000 (1 start, 1 end)
35 VSYNC_B (0x00061014): 0x00000000 (1 start, 1 end)
36 PIPEBSRC (0x0006101c): 0x00000000 (1, 1)
37 VSYNCSHIFT_B (0x00061028): 0x00000000
38 PIPEB_DATA_M1 (0x00061030): 0x00000000 (TU 1, val 0x0 0)
39 PIPEB_DATA_N1 (0x00061034): 0x00000000 (val 0x0 0)
40 PIPEB_DATA_M2 (0x00061038): 0x00000000 (TU 1, val 0x0 0)
41 PIPEB_DATA_N2 (0x0006103c): 0x00000000 (val 0x0 0)
42 PIPEB_LINK_M1 (0x00061040): 0x00000000 (val 0x0 0)
43 PIPEB_LINK_N1 (0x00061044): 0x00000000 (val 0x0 0)
44 PIPEB_LINK_M2 (0x00061048): 0x00000000 (val 0x0 0)
45 PIPEB_LINK_N2 (0x0006104c): 0x00000000 (val 0x0 0)
46 FDI_TXB_CTL (0x00061100): 0x00040000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable)
47 HTOTAL_C (0x00062000): 0x00000000 (1 active, 1 total)
48 HBLANK_C (0x00062004): 0x00000000 (1 start, 1 end)
49 HSYNC_C (0x00062008): 0x00000000 (1 start, 1 end)
50 VTOTAL_C (0x0006200c): 0x00000000 (1 active, 1 total)
51 VBLANK_C (0x00062010): 0x00000000 (1 start, 1 end)
52 VSYNC_C (0x00062014): 0x00000000 (1 start, 1 end)
53 PIPECSRC (0x0006201c): 0x00000000 (1, 1)
54 VSYNCSHIFT_C (0x00062028): 0x00000000
55 PIPEC_DATA_M1 (0x00062030): 0x00000000 (TU 1, val 0x0 0)
56 PIPEC_DATA_N1 (0x00062034): 0x00000000 (val 0x0 0)
57 PIPEC_DATA_M2 (0x00062038): 0x00000000 (TU 1, val 0x0 0)
58 PIPEC_DATA_N2 (0x0006203c): 0x00000000 (val 0x0 0)
59 PIPEC_LINK_M1 (0x00062040): 0x00000000 (val 0x0 0)
60 PIPEC_LINK_N1 (0x00062044): 0x00000000 (val 0x0 0)
61 PIPEC_LINK_M2 (0x00062048): 0x00000000 (val 0x0 0)
62 PIPEC_LINK_N2 (0x0006204c): 0x00000000 (val 0x0 0)
63 FDI_TXC_CTL (0x00062100): 0x00040000 (disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable)
64 CPU_eDP_A (0x00064000): 0x00000018
65 PFA_WIN_POS (0x00068070): 0x00000000 (0, 0)
66 PFA_WIN_SIZE (0x00068074): 0x00000000 (0, 0)
67 PFA_CTL_1 (0x00068080): 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
68 PFA_CTL_2 (0x00068084): 0x00007e80 (vscale 0.988281)
69 PFA_CTL_3 (0x00068088): 0x00003f40 (vscale initial phase 0.494141)
70 PFA_CTL_4 (0x00068090): 0x00007d54 (hscale 0.979126)
71 PFB_WIN_POS (0x00068870): 0x00000000 (0, 0)
72 PFB_WIN_SIZE (0x00068874): 0x00000000 (0, 0)
73 PFB_CTL_1 (0x00068880): 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
74 PFB_CTL_2 (0x00068884): 0x00007e80 (vscale 0.988281)
75 PFB_CTL_3 (0x00068888): 0x00003f40 (vscale initial phase 0.494141)
76 PFB_CTL_4 (0x00068890): 0x00007d54 (hscale 0.979126)
77 PFC_WIN_POS (0x00069070): 0x00000000 (0, 0)
78 PFC_WIN_SIZE (0x00069074): 0x00000000 (0, 0)
79 PFC_CTL_1 (0x00069080): 0x00000000 (disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
80 PFC_CTL_2 (0x00069084): 0x00007e80 (vscale 0.988281)
81 PFC_CTL_3 (0x00069088): 0x00003f40 (vscale initial phase 0.494141)
82 PFC_CTL_4 (0x00069090): 0x00007d54 (hscale 0.979126)
83 PIPEACONF (0x00070008): 0xc0000050 (enabled, active, pf-pd, rotate 0, 6bpc)
84 DSPACNTR (0x00070180): 0xd8004400 (enabled)
85 DSPABASE (0x00070184): 0x00000000
86 DSPASTRIDE (0x00070188): 0x00001600 (88)
87 DSPASURF (0x0007019c): 0x01407000
88 DSPATILEOFF (0x000701a4): 0x00000000 (0, 0)
89 PIPEBCONF (0x00071008): 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
90 DSPBCNTR (0x00071180): 0x00004000 (disabled)
91 DSPBBASE (0x00071184): 0x00000000
92 DSPBSTRIDE (0x00071188): 0x00000000 (0)
93 DSPBSURF (0x0007119c): 0x00000000
94 DSPBTILEOFF (0x000711a4): 0x00000000 (0, 0)
95 PIPECCONF (0x00072008): 0x00000000 (disabled, inactive, pf-pd, rotate 0, 8bpc)
96 DSPCCNTR (0x00072180): 0x00004000 (disabled)
97 DSPCBASE (0x00072184): 0x00000000
98 DSPCSTRIDE (0x00072188): 0x00000000 (0)
99 DSPCSURF (0x0007219c): 0x00000000
100 DSPCTILEOFF (0x000721a4): 0x00000000 (0, 0)
101 PCH_DPLL_A (0x000c6014): 0x88046004 (enable, sdvo high speed no, mode LVDS, p2 Div 14, FPA0 P1 3, FPA1 P1 3, refclk SSC, sdvo/hdmi mul 1)
102 PCH_DPLL_B (0x000c6018): 0x04800080 (disable, sdvo high speed no, mode Non-LVDS, p2 Div 10, FPA0 P1 8, FPA1 P1 8, refclk default 120Mhz, sdvo/hdmi mul 1)
103 PCH_FPA0 (0x000c6040): 0x00021005 (n = 2, m1 = 16, m2 = 5)
104 PCH_FPA1 (0x000c6044): 0x00021005 (n = 2, m1 = 16, m2 = 5)
105 PCH_FPB0 (0x000c6048): 0x00030d07 (n = 3, m1 = 13, m2 = 7)
106 PCH_FPB1 (0x000c604c): 0x00030d07 (n = 3, m1 = 13, m2 = 7)
107 PCH_DREF_CONTROL (0x000c6200): 0x00001402 (cpu source disable, ssc_source enable, nonspread_source enable, superspread_source disable, ssc4_mode downspread, ssc1 enable, ssc4 disable)
108 PCH_RAWCLK_FREQ (0x000c6204): 0x0000007d (FDL_TP1 timer 0.5us, FDL_TP2 timer 1.5us, freq 125)
109 PCH_DPLL_TMR_CFG (0x000c6208): 0x0271186a
110 PCH_SSC4_PARMS (0x000c6210): 0x01204860
111 PCH_SSC4_AUX_PARMS (0x000c6214): 0x000029c5
112 PCH_DPLL_ANALOG_CTL (0x000c6300): 0x00008000
113 PCH_DPLL_SEL (0x000c7000): 0x00000008
114 PCH_PP_STATUS (0x000c7200): 0xc0000008 (on, ready, sequencing idle)
115 PCH_PP_CONTROL (0x000c7204): 0xabcd0003 (blacklight disabled, power down on reset, panel on)
116 PCH_PP_ON_DELAYS (0x000c7208): 0x02580a28
117 PCH_PP_OFF_DELAYS (0x000c720c): 0x01f407d0
118 PCH_PP_DIVISOR (0x000c7210): 0x00186905
119 BLC_PWM_PCH_CTL1 (0x000c8250): 0x80000000 (enable 1, override 0, inverted polarity 0)
120 BLC_PWM_PCH_CTL2 (0x000c8254): 0x13120000 (freq 4882, cycle 0)
121 TRANS_HTOTAL_A (0x000e0000): 0x05bd0555 (1366 active, 1470 total)
122 TRANS_HBLANK_A (0x000e0004): 0x05bd0555 (1366 start, 1470 end)
123 TRANS_HSYNC_A (0x000e0008): 0x05950575 (1398 start, 1430 end)
124 TRANS_VTOTAL_A (0x000e000c): 0x031102ff (768 active, 786 total)
125 TRANS_VBLANK_A (0x000e0010): 0x031102ff (768 start, 786 end)
126 TRANS_VSYNC_A (0x000e0014): 0x03070302 (771 start, 776 end)
127 TRANS_VSYNCSHIFT_A (0x000e0028): 0x00000000
128 TRANSA_DATA_M1 (0x000e0030): 0x00000000 (TU 1, val 0x0 0)
129 TRANSA_DATA_N1 (0x000e0034): 0x00000000 (val 0x0 0)
130 TRANSA_DATA_M2 (0x000e0038): 0x00000000 (TU 1, val 0x0 0)
131 TRANSA_DATA_N2 (0x000e003c): 0x00000000 (val 0x0 0)
132 TRANSA_DP_LINK_M1 (0x000e0040): 0x00000000 (val 0x0 0)
133 TRANSA_DP_LINK_N1 (0x000e0044): 0x00000000 (val 0x0 0)
134 TRANSA_DP_LINK_M2 (0x000e0048): 0x00000000 (val 0x0 0)
135 TRANSA_DP_LINK_N2 (0x000e004c): 0x00000000 (val 0x0 0)
136 TRANS_DP_CTL_A (0x000e0300): 0x60000418
137 TRANS_HTOTAL_B (0x000e1000): 0x00000000 (1 active, 1 total)
138 TRANS_HBLANK_B (0x000e1004): 0x00000000 (1 start, 1 end)
139 TRANS_HSYNC_B (0x000e1008): 0x00000000 (1 start, 1 end)
140 TRANS_VTOTAL_B (0x000e100c): 0x00000000 (1 active, 1 total)
141 TRANS_VBLANK_B (0x000e1010): 0x00000000 (1 start, 1 end)
142 TRANS_VSYNC_B (0x000e1014): 0x00000000 (1 start, 1 end)
143 TRANS_VSYNCSHIFT_B (0x000e1028): 0x00000000
144 TRANSB_DATA_M1 (0x000e1030): 0x00000000 (TU 1, val 0x0 0)
145 TRANSB_DATA_N1 (0x000e1034): 0x00000000 (val 0x0 0)
146 TRANSB_DATA_M2 (0x000e1038): 0x00000000 (TU 1, val 0x0 0)
147 TRANSB_DATA_N2 (0x000e103c): 0x00000000 (val 0x0 0)
148 TRANSB_DP_LINK_M1 (0x000e1040): 0x00000000 (val 0x0 0)
149 TRANSB_DP_LINK_N1 (0x000e1044): 0x00000000 (val 0x0 0)
150 TRANSB_DP_LINK_M2 (0x000e1048): 0x00000000 (val 0x0 0)
151 TRANSB_DP_LINK_N2 (0x000e104c): 0x00000000 (val 0x0 0)
152 PCH_ADPA (0x000e1100): 0x00f40000 (disabled, transcoder A, -hsync, -vsync)
153 HDMIB (0x000e1140): 0x00000018 (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected)
154 HDMIC (0x000e1150): 0x0000001c (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync detected)
155 HDMID (0x000e1160): 0x00000018 (disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected)
156 PCH_LVDS (0x000e1180): 0x80300302 (enabled, pipe A, 18 bit, 1 channel)
157 TRANS_DP_CTL_B (0x000e1300): 0x60000018
158 TRANS_HTOTAL_C (0x000e2000): 0x00000000 (1 active, 1 total)
159 TRANS_HBLANK_C (0x000e2004): 0x00000000 (1 start, 1 end)
160 TRANS_HSYNC_C (0x000e2008): 0x00000000 (1 start, 1 end)
161 TRANS_VTOTAL_C (0x000e200c): 0x00000000 (1 active, 1 total)
162 TRANS_VBLANK_C (0x000e2010): 0x00000000 (1 start, 1 end)
163 TRANS_VSYNC_C (0x000e2014): 0x00000000 (1 start, 1 end)
164 TRANS_VSYNCSHIFT_C (0x000e2028): 0x00000000
165 TRANSC_DATA_M1 (0x000e2030): 0x00000000 (TU 1, val 0x0 0)
166 TRANSC_DATA_N1 (0x000e2034): 0x00000000 (val 0x0 0)
167 TRANSC_DATA_M2 (0x000e2038): 0x00000000 (TU 1, val 0x0 0)
168 TRANSC_DATA_N2 (0x000e203c): 0x00000000 (val 0x0 0)
169 TRANSC_DP_LINK_M1 (0x000e2040): 0x00000000 (val 0x0 0)
170 TRANSC_DP_LINK_N1 (0x000e2044): 0x00000000 (val 0x0 0)
171 TRANSC_DP_LINK_M2 (0x000e2048): 0x00000000 (val 0x0 0)
172 TRANSC_DP_LINK_N2 (0x000e204c): 0x00000000 (val 0x0 0)
173 TRANS_DP_CTL_C (0x000e2300): 0x60000018
174 PCH_DP_B (0x000e4100): 0x00000000
175 PCH_DP_C (0x000e4200): 0x00000004
176 PCH_DP_D (0x000e4300): 0x00000000
177 TRANSACONF (0x000f0008): 0xc0000000 (enable, active, progressive)
178 FDI_RXA_CTL (0x000f000c): 0x8c022b50 (enable, train pattern pattern_1, port width X1, 6bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL enable,FS ecc enable, FE ecc disable, FS err report enable, FE err report enable,scrambing enable, enhanced framing enable, PCDClk)
179 FDI_RXA_MISC (0x000f0010): 0x00200090 (FDI Delay 144)
180 FDI_RXA_IIR (0x000f0014): 0x00000000
181 FDI_RXA_IMR (0x000f0018): 0x000008ff
182 FDI_RXA_TUSIZE1 (0x000f0030): 0x7e000000
183 FDI_RXA_TUSIZE2 (0x000f0038): 0x7e000000
184 TRANSBCONF (0x000f1008): 0x00000000 (disable, inactive, progressive)
185 FDI_RXB_CTL (0x000f100c): 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk)
186 FDI_RXB_MISC (0x000f1010): 0x00200080 (FDI Delay 128)
187 FDI_RXB_IIR (0x000f1014): 0x00000000
188 FDI_RXB_IMR (0x000f1018): 0x000008ff
189 FDI_RXB_TUSIZE1 (0x000f1030): 0x7e000000
190 FDI_RXB_TUSIZE2 (0x000f1038): 0x7e000000
191 TRANSCCONF (0x000f2008): 0x00000000 (disable, inactive, progressive)
192 FDI_RXC_CTL (0x000f200c): 0x00000040 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk)
193 FDI_RXC_MISC (0x000f2010): 0x00200080 (FDI Delay 128)
194 FDI_RXC_TUSIZE1 (0x000f2030): 0x7e000000
195 FDI_RXC_TUSIZE2 (0x000f2038): 0x7e000000
196 FDI_PLL_CTL_1 (0x000fe000): 0x7e000000
197 FDI_PLL_CTL_2 (0x000fe004): 0x7e000000
198 RCS_MODE_GEN7 (0x0000229c): 0x00002a00
199 VCS_MODE_GEN7 (0x0001229c): 0x00000200
200 BCS_MODE_GEN7 (0x0002229c): 0x00000200