| 1 | Kernel name: kernel_x86 built on: Jun 4 2010 19:43:36 version 0x1
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| 2 | 2 Intel Core 2 Extreme, revision 467a running at 2599MHz (ID: 0x00000000 0x00000000)
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| 3 |
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| 4 | CPU #0: "Pentium(R) Dual-Core CPU E5300 @ 2.60GHz"
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| 5 | Type 0, family 6, model 23, stepping 10, features 0xbfebfbff
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| 6 | FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT
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| 7 | PSE36 CFLUSH DS ACPI MMX FXSTR SSE SSE2 SS HTT TM PBE
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| 8 | Extended Intel: 0x0400e3bd
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| 9 | SSE3 DTES64 MONITOR DS-CPL VMX EST TM2 SSSE3 CX16 xTPR PDCM XSAVE
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| 10 | Extended AMD: type 0, family 0, model 0, stepping 0, features 0x20100000
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| 11 | NX 64
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| 12 | Power Management Features:
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| 13 |
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| 14 | L2 Data cache 8-way set associative, 1 lines/tag, 64 bytes/line
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| 15 | L2 cache: 2048 KB, 8-way set associative, 0 lines/tag, 64 bytes/line
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| 16 |
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| 17 | Inst TLB: 2M-bytes pages, 4-way set associative, 8 entries OR 4M, 4-way, 4 entries
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| 18 | Inst TLB: 4K-bytes pages, 4-way set associative, 128 entries
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| 19 | Data TLB: 4M-byte pages, 4-way set associative, 32 entries
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| 20 | 64-byte Prefetching
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| 21 | L1 Data TLB: 4K-bytes pages, 4-way set associative, 16 entries
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| 22 | L1 Data TLB: 4M-bytes pages, 4-way set associative, 16 entries
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| 23 | L2 cache: 2048 KB, 8-way set associative, 64 bytes/line
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| 24 | L1 inst cache: 32 KB, 8-way set associative, 64 bytes/line
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| 25 | Data TLB: 4K-bytes pages, 4-way set associative, 256 entries
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| 26 | L1 data cache: 32 KB, 8-way set associative, 64 bytes/line
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| 27 |
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| 28 | CPU #1: "Pentium(R) Dual-Core CPU E5300 @ 2.60GHz"
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| 29 | Type 0, family 6, model 23, stepping 10, features 0xbfebfbff
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| 30 | FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT
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| 31 | PSE36 CFLUSH DS ACPI MMX FXSTR SSE SSE2 SS HTT TM PBE
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|---|
| 32 | Extended Intel: 0x0400e3bd
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| 33 | SSE3 DTES64 MONITOR DS-CPL VMX EST TM2 SSSE3 CX16 xTPR PDCM XSAVE
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| 34 | Extended AMD: type 0, family 0, model 0, stepping 0, features 0x20100000
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| 35 | NX 64
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| 36 | Power Management Features:
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| 37 |
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| 38 | L2 Data cache 8-way set associative, 1 lines/tag, 64 bytes/line
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| 39 | L2 cache: 2048 KB, 8-way set associative, 0 lines/tag, 64 bytes/line
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| 40 |
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| 41 | Inst TLB: 2M-bytes pages, 4-way set associative, 8 entries OR 4M, 4-way, 4 entries
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| 42 | Inst TLB: 4K-bytes pages, 4-way set associative, 128 entries
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| 43 | Data TLB: 4M-byte pages, 4-way set associative, 32 entries
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| 44 | 64-byte Prefetching
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| 45 | L1 Data TLB: 4K-bytes pages, 4-way set associative, 16 entries
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| 46 | L1 Data TLB: 4M-bytes pages, 4-way set associative, 16 entries
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| 47 | L2 cache: 2048 KB, 8-way set associative, 64 bytes/line
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| 48 | L1 inst cache: 32 KB, 8-way set associative, 64 bytes/line
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| 49 | Data TLB: 4K-bytes pages, 4-way set associative, 256 entries
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| 50 | L1 data cache: 32 KB, 8-way set associative, 64 bytes/line
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| 51 |
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| 52 | 2036183040 bytes free (used/max 108023808 / 2144206848)
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| 53 | (cached 210685952)
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| 54 | 64476 semaphores free (used/max 1060 / 65536)
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| 55 | 3929 ports free (used/max 167 / 4096)
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| 56 | 3959 threads free (used/max 137 / 4096)
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| 57 | 2028 teams free (used/max 20 / 2048)
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