Ticket #8445: 0002-x86-Initialize-IA32_MSR_ENERGY_PERF_BIAS.2.patch

File 0002-x86-Initialize-IA32_MSR_ENERGY_PERF_BIAS.2.patch, 2.6 KB (added by yongcong, 12 years ago)
  • headers/private/kernel/arch/x86/arch_cpu.h

    From b36b9f488d5be3f92b30466873fd1f46ac05a09b Mon Sep 17 00:00:00 2001
    From: Yongcong Du <ycdu.vmcore@gmail.com>
    Date: Tue, 3 Apr 2012 23:46:51 +0800
    Subject: [PATCH 2/2] x86: Initialize IA32_MSR_ENERGY_PERF_BIAS
    
    The lowest 4 bits of the MSR serves as a hint to the hardware to
    favor performance or energy saving. 0 means a hint preference for
    highest performance while 15 corresponds to the maximum energy
    savings. A value of 7 translates into a hint to balance performance
    with energy savings.
    
    The default reset value of the MSR is 0. If BIOS doesn't intialize
    the MSR, the hardware will run in performance state. This patch
    initialize the MSR with value of 7 for balance between performance
    and energy savings
    ---
     headers/private/kernel/arch/x86/arch_cpu.h |    1 +
     src/system/kernel/arch/x86/arch_cpu.cpp    |   20 ++++++++++++++++++++
     2 个文件被修改,插入 21 行(+)
    
    diff --git a/headers/private/kernel/arch/x86/arch_cpu.h b/headers/private/kernel/arch/x86/arch_cpu.h
    index 4365fe1..2ce6bd0 100644
    a b  
    2929#define IA32_MSR_SYSENTER_CS            0x174
    3030#define IA32_MSR_SYSENTER_ESP           0x175
    3131#define IA32_MSR_SYSENTER_EIP           0x176
     32#define IA32_MSR_ENERGY_PERF_BIAS       0x1b0
    3233#define IA32_MSR_MTRR_DEFAULT_TYPE      0x2ff
    3334#define IA32_MSR_MTRR_PHYSICAL_BASE_0   0x200
    3435#define IA32_MSR_MTRR_PHYSICAL_MASK_0   0x201
  • src/system/kernel/arch/x86/arch_cpu.cpp

    diff --git a/src/system/kernel/arch/x86/arch_cpu.cpp b/src/system/kernel/arch/x86/arch_cpu.cpp
    index 5ebb194..872a0d4 100644
    a b static const struct cpu_vendor_info vendor_info[VENDOR_NUM] = {  
    6969
    7070#define K8_CMPHALT              (K8_SMIONCMPHALT | K8_C1EONCMPHALT)
    7171
     72/*
     73 * 0 favors highest performance while 15 corresponds to the maximum energy
     74 * savings. 7 means balance between performance and energy savings.
     75 * Refer to Section 14.3.4 in <Intel 64 and IA-32 Architectures Software
     76 * Developer's Manual Volume 3>  for details
     77 */
     78#define ENERGY_PERF_BIAS_PERFORMANCE    0
     79#define ENERGY_PERF_BIAS_BALANCE        7
     80#define ENERGY_PERF_BIAS_POWERSAVE      15
     81
    7282struct set_mtrr_parameter {
    7383    int32   index;
    7484    uint64  base;
    arch_cpu_init_percpu(kernel_args *args, int cpu)  
    786796        else
    787797            gCpuIdleFunc = halt_idle;
    788798    }
     799
     800    if (x86_check_feature(IA32_FEATURE_EPB, FEATURE_6_ECX)) {
     801        uint64 msr = x86_read_msr(IA32_MSR_ENERGY_PERF_BIAS);
     802        if ((msr & 0xf) == ENERGY_PERF_BIAS_PERFORMANCE) {
     803            msr &= ~0xf;
     804            msr |= ENERGY_PERF_BIAS_BALANCE;
     805            x86_write_msr(IA32_MSR_ENERGY_PERF_BIAS, msr);
     806        }
     807    }
     808
    789809    return 0;
    790810}
    791811