ACCELERANT_MODE_COUNT: the modelist contains 288 modes GET_MODE_LIST: exporting the modelist created before. GET_ACCELERANT_DEVICE_INFO: returning info PROPOSEMODE: Haiku screenprefs tunnel detected. Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 287010.189000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 30482kHz SETMODE: requested virtual_width 640, virtual_height 480 PROPOSEMODE: (ENTER) requested virtual_width 640, virtual_height 480 INIT: memory pitch will be set to 640 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 242.857147Mhz DAC: pix PLL check: requested 30.482000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03 PROPOSEMODE: validated virtual_width 640, virtual_height 480 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 640 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 30357kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 242.857147Mhz DAC: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 30.357000 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 30357kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 242.857147Mhz DAC2: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 30.357000 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0140 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0140 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:67 HDISPEND:4f HBLNKS:4f HBLNKE:6b HSYNCS:54 HSYNCE:60 VTOT:24a VDISPEND:1df VBLNKS:1df VBLNKE:24b VSYNCS:205 VSYNCE:20b CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:67 HDISPEND:4f HBLNKS:4f HBLNKE:6b HSYNCS:54 HSYNCE:60 VTOT:24a VDISPEND:1df VBLNKS:1df VBLNKE:24b VSYNCS:205 VSYNCE:20b CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 287036.398000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 30357kHz SETMODE: requested virtual_width 640, virtual_height 480 PROPOSEMODE: (ENTER) requested virtual_width 640, virtual_height 480 INIT: memory pitch will be set to 640 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 242.857147Mhz DAC: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03 PROPOSEMODE: validated virtual_width 640, virtual_height 480 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 640 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 30357kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 242.857147Mhz DAC: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003220e): M1=14, N1=34, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 242.857147Mhz DAC: pixelclock is 30.357143Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 30.357000 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 30357kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 242.857147Mhz DAC2: pix PLL check: requested 30.357000MHz got 30.357143MHz, mnp 0x0e 0x22 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003220e): M1=14, N1=34, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 242.857147Mhz DAC2: pixelclock is 30.357143Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 30.357000 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0140 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0140 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:67 HDISPEND:4f HBLNKS:4f HBLNKE:6b HSYNCS:54 HSYNCE:60 VTOT:24a VDISPEND:1df VBLNKS:1df VBLNKE:24b VSYNCS:205 VSYNCE:20b CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:67 HDISPEND:4f HBLNKS:4f HBLNKE:6b HSYNCS:54 HSYNCE:60 VTOT:24a VDISPEND:1df VBLNKS:1df VBLNKE:24b VSYNCS:205 VSYNCE:20b CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 291449.282000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003220e): M1=14, N1=34, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 242.857147Mhz DAC: pixelclock is 30.357143Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003220e): M1=14, N1=34, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 242.857147Mhz DAC2: pixelclock is 30.357143Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 291469.316000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 298189.264000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 38215kHz SETMODE: requested virtual_width 800, virtual_height 600 PROPOSEMODE: (ENTER) requested virtual_width 800, virtual_height 600 INIT: memory pitch will be set to 800 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 307.142853Mhz DAC: pix PLL check: requested 38.215000MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03 PROPOSEMODE: validated virtual_width 800, virtual_height 600 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 800 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 38392kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 307.142853Mhz DAC: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 38.391998 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 38392kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 307.142853Mhz DAC2: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 38.391998 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0190 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0190 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:7b HDISPEND:63 HBLNKS:63 HBLNKE:7f HSYNCS:68 HSYNCE:72 VTOT:26c VDISPEND:257 VBLNKS:257 VBLNKE:26d VSYNCS:259 VSYNCE:25c CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:7b HDISPEND:63 HBLNKS:63 HBLNKE:7f HSYNCS:68 HSYNCE:72 VTOT:26c VDISPEND:257 VBLNKS:257 VBLNKE:26d VSYNCS:259 VSYNCE:25c CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 298239.686000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 38392kHz SETMODE: requested virtual_width 800, virtual_height 600 PROPOSEMODE: (ENTER) requested virtual_width 800, virtual_height 600 INIT: memory pitch will be set to 800 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 307.142853Mhz DAC: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03 PROPOSEMODE: validated virtual_width 800, virtual_height 600 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 800 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 38392kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 307.142853Mhz DAC: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00032b0e): M1=14, N1=43, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 307.142853Mhz DAC: pixelclock is 38.392857Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 38.391998 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 38392kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 307.142853Mhz DAC2: pix PLL check: requested 38.391998MHz got 38.392857MHz, mnp 0x0e 0x2b 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00032b0e): M1=14, N1=43, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 307.142853Mhz DAC2: pixelclock is 38.392857Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 38.391998 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0190 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0190 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:7b HDISPEND:63 HBLNKS:63 HBLNKE:7f HSYNCS:68 HSYNCE:72 VTOT:26c VDISPEND:257 VBLNKS:257 VBLNKE:26d VSYNCS:259 VSYNCE:25c CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:7b HDISPEND:63 HBLNKS:63 HBLNKE:7f HSYNCS:68 HSYNCE:72 VTOT:26c VDISPEND:257 VBLNKS:257 VBLNKE:26d VSYNCS:259 VSYNCE:25c CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 305888.521000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00032b0e): M1=14, N1=43, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 307.142853Mhz DAC: pixelclock is 38.392857Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00032b0e): M1=14, N1=43, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 307.142853Mhz DAC2: pixelclock is 38.392857Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 305911.634000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 358631.008000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 81624kHz SETMODE: requested virtual_width 1152, virtual_height 864 PROPOSEMODE: (ENTER) requested virtual_width 1152, virtual_height 864 INIT: memory pitch will be set to 1152 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 328.571411Mhz DAC: pix PLL check: requested 81.624001MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02 PROPOSEMODE: validated virtual_width 1152, virtual_height 864 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1152 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 82142kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 328.571411Mhz DAC: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 82.141998 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 82142kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 328.571411Mhz DAC2: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 82.141998 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0240 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0240 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:b9 HDISPEND:8f HBLNKS:8f HBLNKE:bd HSYNCS:98 HSYNCE:a7 VTOT:37d VDISPEND:35f VBLNKS:35f VBLNKE:37e VSYNCS:361 VSYNCE:364 CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:b9 HDISPEND:8f HBLNKS:8f HBLNKE:bd HSYNCS:98 HSYNCE:a7 VTOT:37d VDISPEND:35f VBLNKS:35f VBLNKE:37e VSYNCS:361 VSYNCE:364 CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 358658.991000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 82142kHz SETMODE: requested virtual_width 1152, virtual_height 864 PROPOSEMODE: (ENTER) requested virtual_width 1152, virtual_height 864 INIT: memory pitch will be set to 1152 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 328.571411Mhz DAC: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02 PROPOSEMODE: validated virtual_width 1152, virtual_height 864 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1152 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 82142kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 328.571411Mhz DAC: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00022e0e): M1=14, N1=46, P1=4 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 328.571411Mhz DAC: pixelclock is 82.142853Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 82.141998 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 82142kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 328.571411Mhz DAC2: pix PLL check: requested 82.141998MHz got 82.142853MHz, mnp 0x0e 0x2e 0x02 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00022e0e): M1=14, N1=46, P1=4 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 328.571411Mhz DAC2: pixelclock is 82.142853Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 82.141998 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0240 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0240 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:b9 HDISPEND:8f HBLNKS:8f HBLNKE:bd HSYNCS:98 HSYNCE:a7 VTOT:37d VDISPEND:35f VBLNKS:35f VBLNKE:37e VSYNCS:361 VSYNCE:364 CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:b9 HDISPEND:8f HBLNKS:8f HBLNKE:bd HSYNCS:98 HSYNCE:a7 VTOT:37d VDISPEND:35f VBLNKS:35f VBLNKE:37e VSYNCS:361 VSYNCE:364 CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 363461.940000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00022e0e): M1=14, N1=46, P1=4 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 328.571411Mhz DAC: pixelclock is 82.142853Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00022e0e): M1=14, N1=46, P1=4 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 328.571411Mhz DAC2: pixelclock is 82.142853Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 363501.405000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 372908.550000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 107964kHz SETMODE: requested virtual_width 1280, virtual_height 1024 PROPOSEMODE: (ENTER) requested virtual_width 1280, virtual_height 1024 INIT: memory pitch will be set to 1280 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 430.769226Mhz DAC: pix PLL check: requested 107.962997MHz got 107.692307MHz, mnp 0x0d 0x38 0x02 PROPOSEMODE: validated virtual_width 1280, virtual_height 1024 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1280 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 107692kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 430.769226Mhz DAC: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 107.692001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 107692kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 430.769226Mhz DAC2: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 107.692001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0280 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0280 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:ce HDISPEND:9f HBLNKS:9f HBLNKE:d2 HSYNCS:a6 HSYNCE:b4 VTOT:428 VDISPEND:3ff VBLNKS:3ff VBLNKE:429 VSYNCS:401 VSYNCE:404 CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:ce HDISPEND:9f HBLNKS:9f HBLNKE:d2 HSYNCS:a6 HSYNCE:b4 VTOT:428 VDISPEND:3ff VBLNKS:3ff VBLNKE:429 VSYNCS:401 VSYNCE:404 CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 372931.934000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 107692kHz SETMODE: requested virtual_width 1280, virtual_height 1024 PROPOSEMODE: (ENTER) requested virtual_width 1280, virtual_height 1024 INIT: memory pitch will be set to 1280 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 430.769226Mhz DAC: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02 PROPOSEMODE: validated virtual_width 1280, virtual_height 1024 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1280 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 107692kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 430.769226Mhz DAC: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0002380d): M1=13, N1=56, P1=4 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 430.769226Mhz DAC: pixelclock is 107.692307Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 107.692001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 107692kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 430.769226Mhz DAC2: pix PLL check: requested 107.692001MHz got 107.692307MHz, mnp 0x0d 0x38 0x02 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0002380d): M1=13, N1=56, P1=4 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 430.769226Mhz DAC2: pixelclock is 107.692307Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 107.692001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0280 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0280 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:ce HDISPEND:9f HBLNKS:9f HBLNKE:d2 HSYNCS:a6 HSYNCE:b4 VTOT:428 VDISPEND:3ff VBLNKS:3ff VBLNKE:429 VSYNCS:401 VSYNCE:404 CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:ce HDISPEND:9f HBLNKS:9f HBLNKE:d2 HSYNCS:a6 HSYNCE:b4 VTOT:428 VDISPEND:3ff VBLNKS:3ff VBLNKE:429 VSYNCS:401 VSYNCE:404 CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 378079.028000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0002380d): M1=13, N1=56, P1=4 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 430.769226Mhz DAC: pixelclock is 107.692307Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0002380d): M1=13, N1=56, P1=4 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 430.769226Mhz DAC2: pixelclock is 107.692307Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 378101.148000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 387475.430000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 122614kHz SETMODE: requested virtual_width 1400, virtual_height 1050 PROPOSEMODE: (ENTER) requested virtual_width 1400, virtual_height 1050 INIT: memory pitch will be set to 1408 pixels for colorspace 0x00000008 INIT: effective mode slopspace is 8 pixels DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 246.153839Mhz DAC: pix PLL check: requested 122.612999MHz got 123.076920MHz, mnp 0x0d 0x20 0x01 PROPOSEMODE: validated virtual_width 1400, virtual_height 1050 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1408 pixels for colorspace 0x00000008 INIT: effective mode slopspace is 8 pixels SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 123076kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 246.153839Mhz DAC: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 123.075996 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 123076kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 246.153839Mhz DAC2: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 123.075996 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $02c0 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $02c0 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:e6 HDISPEND:ae HBLNKS:ae HBLNKE:ea HSYNCS:ba HSYNCE:cd VTOT:43d VDISPEND:419 VBLNKS:419 VBLNKE:43e VSYNCS:41b VSYNCE:41e CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:e6 HDISPEND:ae HBLNKS:ae HBLNKE:ea HSYNCS:ba HSYNCE:cd VTOT:43d VDISPEND:419 VBLNKS:419 VBLNKE:43e VSYNCS:41b VSYNCE:41e CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 387497.505000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 123076kHz SETMODE: requested virtual_width 1400, virtual_height 1050 PROPOSEMODE: (ENTER) requested virtual_width 1400, virtual_height 1050 INIT: memory pitch will be set to 1408 pixels for colorspace 0x00000008 INIT: effective mode slopspace is 8 pixels DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 246.153839Mhz DAC: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01 PROPOSEMODE: validated virtual_width 1400, virtual_height 1050 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1408 pixels for colorspace 0x00000008 INIT: effective mode slopspace is 8 pixels SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 123076kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 246.153839Mhz DAC: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0001200d): M1=13, N1=32, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 246.153839Mhz DAC: pixelclock is 123.076920Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 123.075996 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 123076kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 246.153839Mhz DAC2: pix PLL check: requested 123.075996MHz got 123.076920MHz, mnp 0x0d 0x20 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0001200d): M1=13, N1=32, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 246.153839Mhz DAC2: pixelclock is 123.076920Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 123.075996 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $02c0 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $02c0 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:e6 HDISPEND:ae HBLNKS:ae HBLNKE:ea HSYNCS:ba HSYNCE:cd VTOT:43d VDISPEND:419 VBLNKS:419 VBLNKE:43e VSYNCS:41b VSYNCE:41e CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:e6 HDISPEND:ae HBLNKS:ae HBLNKE:ea HSYNCS:ba HSYNCE:cd VTOT:43d VDISPEND:419 VBLNKS:419 VBLNKE:43e VSYNCS:41b VSYNCE:41e CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 391799.867000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0001200d): M1=13, N1=32, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 246.153839Mhz DAC: pixelclock is 123.076920Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0001200d): M1=13, N1=32, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 246.153839Mhz DAC2: pixelclock is 123.076920Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 391854.368000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 399084.711000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 162000kHz SETMODE: requested virtual_width 1600, virtual_height 1200 PROPOSEMODE: (ENTER) requested virtual_width 1600, virtual_height 1200 INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 323.076904Mhz DAC: pix PLL check: requested 162.000000MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 PROPOSEMODE: validated virtual_width 1600, virtual_height 1200 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 161538kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 323.076904Mhz DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 161.537994 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 161538kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 323.076904Mhz DAC2: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 161.537994 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0320 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0320 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:109 HDISPEND:c7 HBLNKS:c7 HBLNKE:10d HSYNCS:d0 HSYNCE:e8 VTOT:4e0 VDISPEND:4af VBLNKS:4af VBLNKE:4e1 VSYNCS:4b1 VSYNCE:4b4 CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:109 HDISPEND:c7 HBLNKS:c7 HBLNKE:10d HSYNCS:d0 HSYNCE:e8 VTOT:4e0 VDISPEND:4af VBLNKS:4af VBLNKE:4e1 VSYNCS:4b1 VSYNCE:4b4 CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 399103.345000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 161538kHz SETMODE: requested virtual_width 1600, virtual_height 1200 PROPOSEMODE: (ENTER) requested virtual_width 1600, virtual_height 1200 INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 323.076904Mhz DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 PROPOSEMODE: validated virtual_width 1600, virtual_height 1200 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 161538kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 323.076904Mhz DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00012a0d): M1=13, N1=42, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 323.076904Mhz DAC: pixelclock is 161.538452Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 161.537994 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 161538kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 323.076904Mhz DAC2: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00012a0d): M1=13, N1=42, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 323.076904Mhz DAC2: pixelclock is 161.538452Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 161.537994 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0320 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0320 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:109 HDISPEND:c7 HBLNKS:c7 HBLNKE:10d HSYNCS:d0 HSYNCE:e8 VTOT:4e0 VDISPEND:4af VBLNKS:4af VBLNKE:4e1 VSYNCS:4b1 VSYNCE:4b4 CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:109 HDISPEND:c7 HBLNKS:c7 HBLNKE:10d HSYNCS:d0 HSYNCE:e8 VTOT:4e0 VDISPEND:4af VBLNKS:4af VBLNKE:4e1 VSYNCS:4b1 VSYNCE:4b4 CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 402763.025000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00012a0d): M1=13, N1=42, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 323.076904Mhz DAC: pixelclock is 161.538452Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00012a0d): M1=13, N1=42, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 323.076904Mhz DAC2: pixelclock is 161.538452Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 402791.236000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 411816.677000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 162000kHz SETMODE: requested virtual_width 1600, virtual_height 1200 PROPOSEMODE: (ENTER) requested virtual_width 1600, virtual_height 1200 INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 323.076904Mhz DAC: pix PLL check: requested 162.000000MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 PROPOSEMODE: validated virtual_width 1600, virtual_height 1200 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 161538kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 323.076904Mhz DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 161.537994 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 161538kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 323.076904Mhz DAC2: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 161.537994 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0320 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0320 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:109 HDISPEND:c7 HBLNKS:c7 HBLNKE:10d HSYNCS:d0 HSYNCE:e8 VTOT:4e0 VDISPEND:4af VBLNKS:4af VBLNKE:4e1 VSYNCS:4b1 VSYNCE:4b4 CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:109 HDISPEND:c7 HBLNKS:c7 HBLNKE:10d HSYNCS:d0 HSYNCE:e8 VTOT:4e0 VDISPEND:4af VBLNKS:4af VBLNKE:4e1 VSYNCS:4b1 VSYNCE:4b4 CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 411835.475000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 161538kHz SETMODE: requested virtual_width 1600, virtual_height 1200 PROPOSEMODE: (ENTER) requested virtual_width 1600, virtual_height 1200 INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 323.076904Mhz DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 PROPOSEMODE: validated virtual_width 1600, virtual_height 1200 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1600 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 161538kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 323.076904Mhz DAC: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00012a0d): M1=13, N1=42, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 323.076904Mhz DAC: pixelclock is 161.538452Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 161.537994 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 161538kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 323.076904Mhz DAC2: pix PLL check: requested 161.537994MHz got 161.538452MHz, mnp 0x0d 0x2a 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00012a0d): M1=13, N1=42, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 323.076904Mhz DAC2: pixelclock is 161.538452Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 161.537994 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0320 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0320 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:109 HDISPEND:c7 HBLNKS:c7 HBLNKE:10d HSYNCS:d0 HSYNCE:e8 VTOT:4e0 VDISPEND:4af VBLNKS:4af VBLNKE:4e1 VSYNCS:4b1 VSYNCE:4b4 CRTC: sync polarity: H:pos V:pos , MISC reg readback: $0b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:109 HDISPEND:c7 HBLNKS:c7 HBLNKE:10d HSYNCS:d0 HSYNCE:e8 VTOT:4e0 VDISPEND:4af VBLNKS:4af VBLNKE:4e1 VSYNCS:4b1 VSYNCE:4b4 CRTC2: sync polarity: H:pos V:pos , MISC reg readback: $0b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 415428.251000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00012a0d): M1=13, N1=42, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 323.076904Mhz DAC: pixelclock is 161.538452Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00012a0d): M1=13, N1=42, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 323.076904Mhz DAC2: pixelclock is 161.538452Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 415456.378000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 422321.318000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 204751kHz SETMODE: requested virtual_width 1792, virtual_height 1344 PROPOSEMODE: (ENTER) requested virtual_width 1792, virtual_height 1344 INIT: memory pitch will be set to 1792 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 407.692291Mhz DAC: pix PLL check: requested 204.751007MHz got 203.846146MHz, mnp 0x0d 0x35 0x01 PROPOSEMODE: validated virtual_width 1792, virtual_height 1344 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1792 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 203846kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 407.692291Mhz DAC: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 203.845993 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 203846kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 407.692291Mhz DAC2: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 203.845993 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0380 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0380 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:12d HDISPEND:df HBLNKS:df HBLNKE:131 HSYNCS:f0 HSYNCE:109 VTOT:570 VDISPEND:53f VBLNKS:53f VBLNKE:571 VSYNCS:541 VSYNCE:544 CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:12d HDISPEND:df HBLNKS:df HBLNKE:131 HSYNCS:f0 HSYNCE:109 VTOT:570 VDISPEND:53f VBLNKS:53f VBLNKE:571 VSYNCS:541 VSYNCE:544 CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 422339.361000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 203846kHz SETMODE: requested virtual_width 1792, virtual_height 1344 PROPOSEMODE: (ENTER) requested virtual_width 1792, virtual_height 1344 INIT: memory pitch will be set to 1792 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 407.692291Mhz DAC: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01 PROPOSEMODE: validated virtual_width 1792, virtual_height 1344 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1792 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 203846kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 407.692291Mhz DAC: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0001350d): M1=13, N1=53, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 407.692291Mhz DAC: pixelclock is 203.846146Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 203.845993 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 203846kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 407.692291Mhz DAC2: pix PLL check: requested 203.845993MHz got 203.846146MHz, mnp 0x0d 0x35 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0001350d): M1=13, N1=53, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 407.692291Mhz DAC2: pixelclock is 203.846146Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 203.845993 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0380 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0380 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:12d HDISPEND:df HBLNKS:df HBLNKE:131 HSYNCS:f0 HSYNCE:109 VTOT:570 VDISPEND:53f VBLNKS:53f VBLNKE:571 VSYNCS:541 VSYNCE:544 CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:12d HDISPEND:df HBLNKS:df HBLNKE:131 HSYNCS:f0 HSYNCE:109 VTOT:570 VDISPEND:53f VBLNKS:53f VBLNKE:571 VSYNCS:541 VSYNCE:544 CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 434425.313000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0001350d): M1=13, N1=53, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 407.692291Mhz DAC: pixelclock is 203.846146Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0001350d): M1=13, N1=53, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 407.692291Mhz DAC2: pixelclock is 203.846146Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 434457.788000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 442319.809000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 218268kHz SETMODE: requested virtual_width 1856, virtual_height 1392 PROPOSEMODE: (ENTER) requested virtual_width 1856, virtual_height 1392 INIT: memory pitch will be set to 1856 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 435.714294Mhz DAC: pix PLL check: requested 218.268005MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01 PROPOSEMODE: validated virtual_width 1856, virtual_height 1392 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1856 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 217857kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 435.714294Mhz DAC: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 217.856995 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 217857kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 435.714294Mhz DAC2: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 217.856995 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $03a0 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $03a0 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:137 HDISPEND:e7 HBLNKS:e7 HBLNKE:13b HSYNCS:f4 HSYNCE:110 VTOT:59d VDISPEND:56f VBLNKS:56f VBLNKE:59e VSYNCS:571 VSYNCE:574 CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:137 HDISPEND:e7 HBLNKS:e7 HBLNKE:13b HSYNCS:f4 HSYNCE:110 VTOT:59d VDISPEND:56f VBLNKS:56f VBLNKE:59e VSYNCS:571 VSYNCE:574 CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 442335.982000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 217857kHz SETMODE: requested virtual_width 1856, virtual_height 1392 PROPOSEMODE: (ENTER) requested virtual_width 1856, virtual_height 1392 INIT: memory pitch will be set to 1856 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 435.714294Mhz DAC: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01 PROPOSEMODE: validated virtual_width 1856, virtual_height 1392 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1856 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 217857kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 435.714294Mhz DAC: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00013d0e): M1=14, N1=61, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 435.714294Mhz DAC: pixelclock is 217.857147Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 217.856995 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 217857kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 435.714294Mhz DAC2: pix PLL check: requested 217.856995MHz got 217.857147MHz, mnp 0x0e 0x3d 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00013d0e): M1=14, N1=61, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 435.714294Mhz DAC2: pixelclock is 217.857147Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 217.856995 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $03a0 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $03a0 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:137 HDISPEND:e7 HBLNKS:e7 HBLNKE:13b HSYNCS:f4 HSYNCE:110 VTOT:59d VDISPEND:56f VBLNKS:56f VBLNKE:59e VSYNCS:571 VSYNCE:574 CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:137 HDISPEND:e7 HBLNKS:e7 HBLNKE:13b HSYNCS:f4 HSYNCE:110 VTOT:59d VDISPEND:56f VBLNKS:56f VBLNKE:59e VSYNCS:571 VSYNCE:574 CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 454424.536000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00013d0e): M1=14, N1=61, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 435.714294Mhz DAC: pixelclock is 217.857147Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00013d0e): M1=14, N1=61, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 435.714294Mhz DAC2: pixelclock is 217.857147Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 454459.260000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 461806.156000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 234000kHz SETMODE: requested virtual_width 1920, virtual_height 1440 PROPOSEMODE: (ENTER) requested virtual_width 1920, virtual_height 1440 INIT: memory pitch will be set to 1920 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 469.230743Mhz DAC: pix PLL check: requested 234.000000MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01 PROPOSEMODE: validated virtual_width 1920, virtual_height 1440 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1920 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 234615kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 469.230743Mhz DAC: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 234.615005 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 234615kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 469.230743Mhz DAC2: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 234.615005 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $03c0 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $03c0 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:140 HDISPEND:ef HBLNKS:ef HBLNKE:144 HSYNCS:100 HSYNCE:11a VTOT:5da VDISPEND:59f VBLNKS:59f VBLNKE:5db VSYNCS:5a1 VSYNCE:5a4 CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:140 HDISPEND:ef HBLNKS:ef HBLNKE:144 HSYNCS:100 HSYNCE:11a VTOT:5da VDISPEND:59f VBLNKS:59f VBLNKE:5db VSYNCS:5a1 VSYNCE:5a4 CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 461821.816000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 234615kHz SETMODE: requested virtual_width 1920, virtual_height 1440 PROPOSEMODE: (ENTER) requested virtual_width 1920, virtual_height 1440 INIT: memory pitch will be set to 1920 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 469.230743Mhz DAC: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01 PROPOSEMODE: validated virtual_width 1920, virtual_height 1440 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1920 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 234615kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 469.230743Mhz DAC: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00013d0d): M1=13, N1=61, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 469.230743Mhz DAC: pixelclock is 234.615372Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 234.615005 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 234615kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 469.230743Mhz DAC2: pix PLL check: requested 234.615005MHz got 234.615372MHz, mnp 0x0d 0x3d 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00013d0d): M1=13, N1=61, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 469.230743Mhz DAC2: pixelclock is 234.615372Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 234.615005 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $03c0 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $03c0 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:140 HDISPEND:ef HBLNKS:ef HBLNKE:144 HSYNCS:100 HSYNCE:11a VTOT:5da VDISPEND:59f VBLNKS:59f VBLNKE:5db VSYNCS:5a1 VSYNCE:5a4 CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:140 HDISPEND:ef HBLNKS:ef HBLNKE:144 HSYNCS:100 HSYNCE:11a VTOT:5da VDISPEND:59f VBLNKS:59f VBLNKE:5db VSYNCS:5a1 VSYNCE:5a4 CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 473905.632000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00013d0d): M1=13, N1=61, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.923077Mhz DAC: VCO frequency is 469.230743Mhz DAC: pixelclock is 234.615372Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00013d0d): M1=13, N1=61, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.923077Mhz DAC2: VCO frequency is 469.230743Mhz DAC2: pixelclock is 234.615372Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 473942.354000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 65178kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 480740.675000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 266952kHz SETMODE: requested virtual_width 2048, virtual_height 1536 PROPOSEMODE: (ENTER) requested virtual_width 2048, virtual_height 1536 INIT: memory pitch will be set to 2048 pixels for colorspace 0x00000005 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 535.714294Mhz DAC: pix PLL check: requested 266.951996MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01 PROPOSEMODE: validated virtual_width 2048, virtual_height 1536 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 2048 pixels for colorspace 0x00000005 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 267857kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 535.714294Mhz DAC: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 521.428589Mhz DAC: pixelclock is 65.178574Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 267.856995 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 267857kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 535.714294Mhz DAC2: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($0003490e): M1=14, N1=73, P1=8 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 521.428589Mhz DAC2: pixelclock is 65.178574Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 267.856995 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 2 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 2 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 16 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 16 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:159 HDISPEND:ff HBLNKS:ff HBLNKE:15d HSYNCS:113 HSYNCE:12f VTOT:633 VDISPEND:5ff VBLNKS:5ff VBLNKE:634 VSYNCS:601 VSYNCE:604 CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:159 HDISPEND:ff HBLNKS:ff HBLNKE:15d HSYNCS:113 HSYNCE:12f VTOT:633 VDISPEND:5ff VBLNKS:5ff VBLNKE:634 VSYNCS:601 VSYNCE:604 CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 480755.481000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 267857kHz SETMODE: requested virtual_width 2048, virtual_height 1536 PROPOSEMODE: (ENTER) requested virtual_width 2048, virtual_height 1536 INIT: memory pitch will be set to 2048 pixels for colorspace 0x00000005 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 535.714294Mhz DAC: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01 PROPOSEMODE: validated virtual_width 2048, virtual_height 1536 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 2048 pixels for colorspace 0x00000005 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 267857kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 535.714294Mhz DAC: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00014b0e): M1=14, N1=75, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 535.714294Mhz DAC: pixelclock is 267.857147Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 267.856995 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 267857kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 535.714294Mhz DAC2: pix PLL check: requested 267.856995MHz got 267.857147MHz, mnp 0x0e 0x4b 0x01 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00014b0e): M1=14, N1=75, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 535.714294Mhz DAC2: pixelclock is 267.857147Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 267.856995 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 2 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 2 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 16 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 16 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:159 HDISPEND:ff HBLNKS:ff HBLNKE:15d HSYNCS:113 HSYNCE:12f VTOT:633 VDISPEND:5ff VBLNKS:5ff VBLNKE:634 VSYNCS:601 VSYNCE:604 CRTC: sync polarity: H:neg V:pos , MISC reg readback: $4b CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:159 HDISPEND:ff HBLNKS:ff HBLNKE:15d HSYNCS:113 HSYNCE:12f VTOT:633 VDISPEND:5ff VBLNKS:5ff VBLNKE:634 VSYNCS:601 VSYNCE:604 CRTC2: sync polarity: H:neg V:pos , MISC reg readback: $4b ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 492846.611000 mS Haiku: tunnel access target=usepanel, command=set, value=0 Haiku: tunnel access target=tvstandard, command=set, value=0 SETMODE: (ENTER) initial modeflags: $0000015f SETMODE: requested target pixelclock 64996kHz SETMODE: requested virtual_width 1024, virtual_height 768 PROPOSEMODE: (ENTER) requested virtual_width 1024, virtual_height 768 INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 64.996002MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 PROPOSEMODE: validated virtual_width 1024, virtual_height 768 pixels PROPOSEMODE: initial modeflags: $0000015f PROPOSEMODE: validated modeflags: $0000015f PROPOSEMODE: completed successfully. CRTC: setting DPMS: display off, hsync disabled, vsync disabled CRTC2: setting DPMS: display off, hsync disabled, vsync disabled INIT: memory pitch will be set to 1024 pixels for colorspace 0x00000008 SETMODE: setting DUALHEAD mode INIT: switching CRTC/DAC use to be straight-through SETMODE: target clock 65178kHz DAC: NV4/NV10/NV20 restrictions apply DAC: pix VCO frequency found 521.428589Mhz DAC: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC: dumping current pixelPLL settings: DAC: divider1 settings ($00014b0e): M1=14, N1=75, P1=2 DAC: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC: phase discriminator frequency is 1.785714Mhz DAC: VCO frequency is 535.714294Mhz DAC: pixelclock is 267.857147Mhz DAC: end of dump. DAC: current NV30_PLLSETUP settings: $00000000 DAC: current (0x0000c040) settings: $340bc003 DAC: Setting PIX PLL for pixelclock 65.178001 DAC: PIX PLL frequency should be locked now... SETMODE: target2 clock 65178kHz DAC2: NV10/NV20 restrictions apply DAC2: pix VCO frequency found 521.428589Mhz DAC2: pix PLL check: requested 65.178001MHz got 65.178574MHz, mnp 0x0e 0x49 0x03 DAC2: dumping current pixelPLL settings: DAC2: divider1 settings ($00014b0e): M1=14, N1=75, P1=2 DAC2: divider2 is enabled, settings ($80000401): M2=1, N2=4 DAC2: phase discriminator frequency is 1.785714Mhz DAC2: VCO frequency is 535.714294Mhz DAC2: pixelclock is 267.857147Mhz DAC2: end of dump. DAC2: current NV30_PLLSETUP settings: $00000000 DAC2: current (0x0000c040) settings: $340bc003 DAC2: Setting PIX PLL for pixelclock 65.178001 DAC2: PIX PLL frequency should be locked now... DAC: Setting screen mode 4 brightness 1.000000 DAC: setting palette DAC: PAL pixrdmsk readback $ff DAC2: Setting screen mode 4 brightness 1.000000 DAC2: setting palette DAC2: PAL pixrdmsk readback $ff CRTC: setting card pitch (offset between lines) CRTC: offset register set to: $0200 CRTC2: setting card pitch (offset between lines) CRTC2: offset register set to: $0200 CRTC: setting card RAM to be displayed bpp 32 CRTC: startadd: $00000800 CRTC: frameRAM: $a0000000 CRTC: framebuffer: $a0000800 CRTC2: setting card RAM to be displayed bpp 32 CRTC2: startadd: $00000800 CRTC2: frameRAM: $a0000000 CRTC2: framebuffer: $a0000800 CRTC: setting timing CRTC: Setting full timing... CRTC: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC: sync polarity: H:neg V:neg , MISC reg readback: $cb CRTC2: setting timing CRTC2: Setting full timing... CRTC2: HTOT:a3 HDISPEND:7f HBLNKS:7f HBLNKE:a7 HSYNCS:83 HSYNCE:94 VTOT:324 VDISPEND:2ff VBLNKS:2ff VBLNKE:325 VSYNCS:303 VSYNCE:309 CRTC2: sync polarity: H:neg V:neg , MISC reg readback: $cb ACC_DMA: timer numerator $000014c8, denominator $00000271 ACC_DMA: command buffer is at adress $0xffffffffa3ff8000 SET_DPMS_MODE: $00000001 CRTC: setting DPMS: display on, hsync enabled, vsync enabled CRTC2: setting DPMS: display on, hsync enabled, vsync enabled INIT: RAM access OK. SETMODE: booted since 492886.989000 mS Overlay: Not exporting hook B_OVERLAY_COUNT. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_SPACES. Overlay: Not exporting hook B_OVERLAY_SUPPORTED_FEATURES. Overlay: Not exporting hook B_ALLOCATE_OVERLAY_BUFFER. Overlay: Not exporting hook B_RELEASE_OVERLAY_BUFFER. Overlay: Not exporting hook B_GET_OVERLAY_CONSTRAINTS. Overlay: Not exporting hook B_ALLOCATE_OVERLAY. Overlay: Not exporting hook B_RELEASE_OVERLAY. Overlay: Not exporting hook B_CONFIGURE_OVERLAY. GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available GET_ACCELERANT_DEVICE_INFO: returning info Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0 GET_EDID_INFO: EDID info not available Haiku: tunnel access target=swap, command=get, value=0 Haiku: tunnel access target=usepanel, command=get, value=0 Haiku: tunnel access target=tvstandard, command=get, value=0