commit cd4c99c9824d74fe97ad3acd030a4d4ae4493705
Author: Nikolas Zimmermann <zimmermann@physik.rwth-aachen.de>
Date:   Fri May 11 14:21:59 2018 +0200

    Start implementing a CPU microcode patcher.
    
    Work-in-progress, detailed change log will follow.

diff --git a/headers/private/kernel/arch/cpu.h b/headers/private/kernel/arch/cpu.h
index 6f82636..9fe2c6b 100644
--- a/headers/private/kernel/arch/cpu.h
+++ b/headers/private/kernel/arch/cpu.h
@@ -36,6 +36,7 @@ void arch_cpu_global_TLB_invalidate(void);
 
 void arch_cpu_sync_icache(void *address, size_t length);
 
+status_t arch_cpu_load_microcode();
 
 #ifdef __cplusplus
 }
diff --git a/headers/private/kernel/arch/x86/microcode_amd.h b/headers/private/kernel/arch/x86/microcode_amd.h
new file mode 100644
index 0000000..bd93917
--- /dev/null
+++ b/headers/private/kernel/arch/x86/microcode_amd.h
@@ -0,0 +1,556 @@
+/*
+ * Copyright 2018 Nikolas Zimmermann, zimmermann@physik.rwth-aachen.de
+ * Distributed under the terms of the MIT License.
+ *
+ * Copyright (C) 2008-2013 Advanced Micro Devices Inc.
+ *               2013-2016 Borislav Petkov <bp@alien8.de>
+ *
+ * Distributed under the terms of the GNU General Public
+ * License version 2.
+ */
+
+#ifndef KERNEL_MICROCODE_AMD_H
+#define KERNEL_MICROCODE_AMD_H
+
+#include <SupportDefs.h>
+
+#define UCODE_MAGIC                     0x00414d44
+#define UCODE_EQUIV_CPU_TABLE_TYPE      0x00000000
+#define UCODE_UCODE_TYPE                0x00000001
+
+#define SECTION_HDR_SIZE                8
+#define CONTAINER_HDR_SZ                12
+
+
+struct equiv_cpu_entry {
+        uint32     installed_cpu;
+        uint32     fixed_errata_mask;
+        uint32     fixed_errata_compare;
+        uint16     equiv_cpu;
+        uint16     res;
+} _PACKED;
+
+struct microcode_header_amd {
+        uint32     data_code;
+        uint32     patch_id;
+        uint16     mc_patch_data_id;
+        uint8      mc_patch_data_len;
+        uint8      init_flag;
+        uint32     mc_patch_data_checksum;
+        uint32     nb_dev_id;
+        uint32     sb_dev_id;
+        uint16     processor_rev_id;
+        uint8      nb_rev_id;
+        uint8      sb_rev_id;
+        uint8      bios_api_rev;
+        uint8      reserved1[3];
+        uint32     match_reg[8];
+} _PACKED;
+
+struct microcode_amd {
+        struct microcode_header_amd     hdr;
+        unsigned int                    mpb[0];
+};
+
+#define PATCH_MAX_SIZE B_PAGE_SIZE
+
+// Data from: https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/amd-ucode/microcode_amd_fam15h.bin (fc4278900493525f8bb122033aef9b818274b378)
+// Converted: hexdump -e '16/1 "_x%02X" "\n"' microcode_amd_fam15h.bin | sed 's/_/\\/g; s/\\x  //g; s/.*/    "&"/' > microcode_amd_fam15h.c
+
+size_t gMicrocodeSize_amd_15h = 7876; // bytes
+const char* gMicrocode_amd_15h =
+    "\x44\x4D\x41\x00\x00\x00\x00\x00\x40\x00\x00\x00\x20\x0F\x60\x00"
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+    "\x00\x00\x00\x00\x00\x00\x00\x00\x12\x60\x00\x00\x00\x00\x00\x00"
+    "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\x00\x00\x00"
+    "\x20\x0A\x00\x00\x13\x20\x06\x03\x3D\x06\x00\x06\x02\x80\x00\x00"
+    "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x12\x60\x00\x00"
+    "\x00\x00\x00\x00\x59\xA9\x5B\x44\xAC\xED\xB4\x75\x3E\x94\xFF\x1A"
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+    "\x3F\x0A\xA2\x75\x49\x22\x89\x0F\xEE\xFC\xC3\xE1\xBE\x94\xD3\xC3"
+    "\xFD\x28\xD1\xF1\xE3\xC4\xC9\x4B\xD8\xF7\x9D\x84\x02\x3D\x3C\xD2"
+    "\xEC\x58\x83\x48\xB0\x61\xD9\x94\xD5\xA4\x23\xAC\xA7\x48\x8D\x58"
+    "\x59\xD3\xE2\xE0\xAD\x61\x08\x35\xCF\xE1\x71\xB8\xED\x7F\xD9\x35"
+    "\xEB\x14\x16\x09\xA8\x27\xD3\x9E\x45\xA6\xD5\xF3\x45\xC4\x5F\x20"
+    "\x0E\x9F\xC9\x56\xED\x74\xAA\x57\x69\x65\x43\x22\x0E\xD5\x81\x7E"
+    "\x11\xCC\x94\x60\xBE\x2A\xE5\x72\x19\x88\x9F\x70\xCC\x33\x0F\x42"
+    "\x0B\x52\xBB\x65\xDF\xD2\x98\xE9\xE2\x73\xF4\xAB\x2C\x89\x00\xD8"
+    "\x67\xBC\x9F\xEC\xE3\xD1\x9E\x53\x8D\x8A\x4B\x7D\xE3\x57\x4B\x2A"
+    "\x16\x1A\xEA\x79\x65\xD8\x64\x6F\xA2\x6F\x6C\xAB\x51\xC8\x59\xDF"
+    "\x65\x71\xBD\xBD\xBB\x4D\x74\xF7\xCA\x1C\x8D\xEB\x7E\xA7\x1C\x25"
+    "\x7D\x58\x18\x17\xEC\x4A\x28\x37\x5A\xF0\xA1\x90\x0A\x0E\xBA\x8D"
+    "\x91\x13\x8D\x05\x8F\xED\xB5\xF5\x4D\xD3\x1C\xD4\x9E\x60\xE3\x96"
+    "\x00\xAA\xC6\x85\x16\xD9\x2F\x30\x7D\x15\x07\x94\xAB\xF7\xD0\x24"
+    "\x94\xB5\x0C\x70\x26\xA4\xD1\x34\xBF\x76\x32\xF1\xAC\x2E\x5E\x4D"
+    "\xCA\x33\xB9\x17\xEB\xAA\x51\x4A\xED\x29\x28\xE7\x1E\xF1\x63\x6F"
+    "\x5E\xB9\xDC\x70\xCB\x94\x32\xE9\x36\x10\x9F\xC0\xDB\xEC\x3D\x16"
+    "\x40\x9F\x62\x80\xCC\x83\x91\xFB\xD2\xFB\x02\x97\x15\xBE\xB3\x4F"
+    "\xB6\x34\x13\xE9\x3E\x7E\xA4\x78\xF3\x17\xAF\xF1\x2D\xF1\xED\x67"
+    "\x99\x92\xC4\x91\x66\xC0\xC5\xC5\x14\x10\xD2\x6A\x51\x7F\x37\x24"
+    "\xDD\x0A\x94\xE4\x5A\xE4\x09\xD4\x75\x32\xF2\x7C\x86\x9D\xD4\xBD"
+    "\x65\x0C\xBF\x17\x9B\x2C\xB0\x9D\xAC\x48\x3C\xE7\x5E\x4A\x44\xE7"
+    "\xD1\x9B\xCB\x62\xB0\x06\xBE\x39\x58\xC5\x28\x63\x92\xE6\xD0\x3E"
+    "\xF0\xE6\xC6\xAC\x6D\xC2\xF5\x5B\xDC\xF4\xF2\xFA\x9E\xE9\x63\xEA"
+    "\x32\x36\x1B\x17\xB4\x6F\x0F\x20\xFB\xF0\x51\xD3\xD0\xE1\x67\xB7"
+    "\x27\xC8\xC8\x8D\x7C\x47\xB2\xE2\x1F\x0F\xB0\x36\x03\x3F\xA3\x1A"
+    "\xDB\x62\x0E\x9F\x5D\xC3\x83\x03\x83\x02\x32\x2F\xC4\xD6\xF0\x4F"
+    "\x64\x6C\x9E\xFD\x66\x00\x0B\xE5\x1F\xE1\xE5\xEC\xD5\x82\x97\x41"
+    "\xC4\xF1\xA6\xFE\xD5\x75\x39\x2F\x1E\x9B\x64\x0C\x80\x85\x7E\x05"
+    "\xAD\xD5\xFD\x01\x18\x75\xE9\x6D\xC6\x18\x5D\xCA\x7A\x7C\x84\x6B"
+    "\xF0\x9E\x3A\x46\xCC\x8D\xDD\x2F\x8F\xF7\xDD\xAB\x62\x8F\x2B\xE9"
+    "\x99\xA6\xC2\x5A\xD5\x2D\x46\x2F\x7B\xD3\x77\x37\x4B\x20\xF1\x77"
+    "\x5C\xE5\x86\xD7\x19\x97\xEE\xA8\x4C\x3B\x8A\x17\x71\x1D\xEF\xD2"
+    "\x08\x0D\xE6\xD8\xB2\x07\x3B\x36\xA6\x74\xF4\x07\x8D\xAE\xC0\xCE"
+    "\x66\x0E\xF6\x5E\x63\xA3\x40\xFF\xCA\xE6\x39\x42\x88\xA3\xDE\xD5"
+    "\x45\x49\x8C\xA2\x86\xD0\x46\x91\x6F\xE2\x92\xD4\x77\x46\x40\xC3"
+    "\x62\x8C\x14\xCC\xD4\x5F\x5E\x51\xDF\xB9\xF5\xED\xCA\x69\xA9\x02"
+    "\x3B\xEE\xAF\x8F\x16\x96\x52\x34\x61\xA8\x5C\x2A\xAB\x0E\xA5\x0F"
+    "\xF8\xDC\x66\xEF\x92\x4C\x3A\x0B\xA0\xC4\xA5\xFE\x13\xD7\xDA\x2C"
+    "\x4E\x7D\xE0\x93\xD0\xC5\xF0\x68\x14\xAF\x6B\x25\x27\x89\x41\x95"
+    "\x0E\x45\x02\xAE\xD4\x42\x49\x28\xAB\x56\xEA\x9C\x82\xC5\x76\x57"
+    "\x18\x95\x0F\xCF\xD1\x8B\x99\xB8\xC1\x99\xDD\x7E\xCF\xDC\x94\x4E"
+    "\xCC\x32\x43\x69\x0C\x41\x76\xD9\xC4\xCC\x34\x9A\x41\x54\x3B\x67"
+    "\xB9\x4A\xA2\xAE\xA2\xCC\x33\x81\x08\x4B\x22\xFB\x24\x8C\xC5\xED"
+    "\x2B\xD1\xBE\x75\xCE\x0F\x25\x8B\xA1\xD4\x26\x6C\xAD\xB1\x38\xF3"
+    "\x03\x9D\x9A\x81\x33\xF2\x34\xD0\x82\xC1\xCB\x81\x16\x5A\xB3\x81"
+    "\x47\x09\x18\xBD\x01\x90\x07\x81\x0A\xF4\xBE\xC2\xE6\x1B\x70\x40"
+    "\x55\x84\xE8\x9E\xC3\x0A\x41\x6D\xE1\x29\x91\x7D\xA6\xA8\x7D\x51"
+    "\xCB\x0F\xA8\x6F\x7F\x5C\xAA\xA9\x0F\x8F\x12\x83\x8A\x6D\x15\x1D"
+    "\x8E\xEB\x72\xC6\x6A\x42\x1E\x5B\x47\xE2\x3D\xDF\xDD\x42\x80\x0A"
+    "\xA2\x15\x46\x8A\xA7\x82\xA6\x4C\xA3\x00\x7A\xBA\x1F\x0D\xFB\x09"
+    "\xFD\xD0\x83\x46\x15\x74\x54\x0F\x4C\xB6\xD4\xD1\xC3\x5D\x10\xCB"
+    "\x37\x6A\x97\xEA\x34\x55\x4F\x3F\x46\x28\xED\x3D\xBC\xCA\x02\x03"
+    "\x5E\x93\x93\x10\x7D\x17\x31\xEC\x14\x14\xF8\x7F\x0D\x52\x17\xCA"
+    "\x37\x37\xF6\xE5\x65\x9E\xDA\x74\x13\x1C\xEC\xAC\xA8\xBC\x39\xA7"
+    "\x0C\x88\xDC\x93\xC0\xB5\xA5\x0D\x2F\x72\x96\x44\x61\xEB\x41\x7B"
+    "\x99\x93\x12\xA9\xA4\xFE\x21\x91\x0B\x0F\x88\x10\x68\x1B\x27\x95"
+    "\x00\x4D\xCF\x4C\x44\xB4\x6D\xDC\x34\xC8\x8C\xFA\x88\xA1\xD0\x34"
+    "\x86\xAC\xFD\xDD\x64\xA0\xA4\x58\xE5\x4D\x45\xF3\xFC\x0D\x67\xB6"
+    "\xAD\x68\x79\xBD\x55\xC7\xA2\x03\x8F\x94\x98\x1B\x3F\xE1\xD0\x58"
+    "\xF1\xC2\x8A\x52\x87\x25\x4D\x70\x46\x0F\x47\xA8\x5E\xC5\xB1\x85"
+    "\x97\x30\xF1\x25\x00\x57\x57\xC4\x01\x0A\xB9\x7C\x58\x8F\x29\x9D"
+    "\xCC\xB3\x9D\xCC\x1F\x39\x56\x38\x81\x90\x32\xC1\x44\xDF\xE4\x68"
+    "\xF2\xC5\x0A\x9C\x06\x3A\x56\x80\x3B\x40\xAD\xC9\x88\x2C\x6A\x3A"
+    "\x8B\x27\xC8\xA4\x0C\xBA\xC6\x13\x2E\xBC\x8E\x40\x3C\x7F\x27\xAE"
+    "\xD4\x4F\x48\x9B\x5D\xF5\xFD\x2C\x6A\x02\xCD\x05\xB0\x9E\x9B\x08"
+    "\x85\x4A\x96\x8D\x46\xA5\x25\xEA\x56\xB4\xC5\x24\x62\xB5\xF6\x88"
+    "\xC8\x2A\xA9\x90\xB4\xB8\xC2\xD5\x38\x34\xAD\xAF\x4D\xEF\x89\xD2"
+    "\xF0\x07\x78\x13\xC7\x3D\xF2\x70\x88\x27\x24\xA7\x34\x0C\xEC\x75"
+    "\x0F\x3D\x4F\x82\xBA\x98\x92\xAC\xA9\xB1\x30\x7A\x8B\xD3\xB7\x37"
+    "\x20\x78\x74\xDF\x09\x05\x19\xAA\x82\x44\x45\x79\xF4\x63\x4B\x61"
+    "\x81\xCC\xB5\xBD\x29\x7C\x8B\x39\x43\x9B\x96\xE5\x9D\xBC\x01\xC7"
+    "\x74\xFC\x08\x0C\xA8\x11\x4E\x70\x3D\x01\x55\xE6\x48\x2D\xC9\x87"
+    "\xDC\x6F\x4E\x9F\x0E\x08\x96\x7C\x44\xF3\xBE\xC9\xE6\x1E\x93\xE8"
+    "\xB7\x3D\xAE\xE0\xEC\x7F\xEE\x3F\x27\x9B\x9E\x61\x19\xA9\x98\x1C"
+    "\x89\x3D\x48\xE1\xF9\xCE\x98\x5C\x5B\x74\xEE\xE3\x08\x4D\xE2\x06"
+    "\x3E\x86\xBC\xEA\xF3\x6E\x6C\x54\x1A\x8C\x2B\xE4\x71\xEE\x97\xB3"
+    "\x71\x45\x2C\xEC\x80\x13\xDB\x31\x0E\xF8\xE9\x31\x59\xD8\x32\xE1"
+    "\x9C\xA2\x44\xDD\x53\xA7\x0D\xAF\xB3\x98\x74\xBF\x8A\xBB\x06\xED"
+    "\xA7\xB6\x70\x3D\xF4\x35\x09\x1F\x54\x0F\x03\xDE\x0A\x9D\x6B\x19"
+    "\xE2\xBF\x04\xAE\x17\x41\x7F\x26\xC5\x2E\x36\xD3\x6D\x86\xBC\x87"
+    "\x49\x8A\xA2\xDE\x87\xD2\xE4\x3E\x66\xF9\x5A\x3B\x0B\x18\xBC\xEB"
+    "\xB9\xCA\x8B\x28\x1C\xB4\xA3\xAB\x42\x33\x41\xDB\xF2\xD5\xE0\xA0"
+    "\xD8\xEF\x79\xB7\x5D\xAF\x57\xF3\xCD\x1D\xF8\x98\x2A\x64\x3A\x79"
+    "\xBE\xFA\x93\xCD\x70\x7C\xDE\xD1\x7C\x5E\xD1\xB5\x02\x88\xBE\xFA"
+    "\xA4\x3F\x95\x41\x44\x8C\x01\x9F\x59\x24\x76\x66\xE3\xBA\xBF\x56"
+    "\x4D\x14\xF8\x3E";
+
+#endif	/* KERNEL_MICROCODE_AMD_H */
diff --git a/src/system/kernel/arch/x86/Jamfile b/src/system/kernel/arch/x86/Jamfile
index dd068ac..a78bfc9 100644
--- a/src/system/kernel/arch/x86/Jamfile
+++ b/src/system/kernel/arch/x86/Jamfile
@@ -74,6 +74,7 @@ if $(TARGET_ARCH) = x86_64 {
 local archGenericSources =
 	arch_altcodepatch.cpp
 	arch_cpu.cpp
+	arch_cpu_microcode.cpp
 	arch_commpage.cpp
 	arch_debug.cpp
 	arch_debug_console.cpp
diff --git a/src/system/kernel/arch/x86/arch_cpu.cpp b/src/system/kernel/arch/x86/arch_cpu.cpp
index 85d2108..93a4516 100644
--- a/src/system/kernel/arch/x86/arch_cpu.cpp
+++ b/src/system/kernel/arch/x86/arch_cpu.cpp
@@ -1129,6 +1129,10 @@ arch_cpu_init_percpu(kernel_args* args, int cpu)
 			gCpuIdleFunc = halt_idle;
 	}
 
+	status_t mc_status = arch_cpu_load_microcode();
+	if (mc_status != B_OK)
+		return mc_status;
+
 	return B_OK;
 }
 
diff --git a/src/system/kernel/arch/x86/arch_cpu_microcode.cpp b/src/system/kernel/arch/x86/arch_cpu_microcode.cpp
new file mode 100644
index 0000000..1f3fd48
--- /dev/null
+++ b/src/system/kernel/arch/x86/arch_cpu_microcode.cpp
@@ -0,0 +1,197 @@
+/*
+ * Copyright 2018, Nikolas Zimmermann, zimmermann@physik.rwth-aachen.de
+ * Distributed under the terms of the MIT License.
+ *
+ * Copyright (C) 2008-2013 Advanced Micro Devices Inc.
+ *               2013-2016 Borislav Petkov <bp@alien8.de>
+ *
+ * Distributed under the terms of the GNU General Public
+ * License version 2.
+ */
+
+
+#include <cpu.h>
+
+#include <stdio.h>
+
+#include <debug.h>
+#include <microcode_amd.h>
+
+#include <arch_system_info.h>
+#include <boot/kernel_args.h>
+
+#define MSR_AMD64_PATCH_LEVEL  0x0000008b
+#define MSR_AMD64_PATCH_LOADER 0xc0010020
+
+/*
+ * This points to the current valid container of microcode patches which we will
+ * save from the initrd/builtin before jettisoning its contents. @mc is the
+ * microcode patch we found to match.
+ */
+struct cont_desc {
+        struct microcode_amd* mc;
+        uint32 cpuid_1_eax;
+        uint32 psize;
+        uint8* data;
+        size_t size;
+};
+
+static uint16
+find_equiv_id(struct equiv_cpu_entry* equiv_table, uint32 sig)
+{
+        for (; equiv_table && equiv_table->installed_cpu; equiv_table++) {
+                if (sig == equiv_table->installed_cpu)
+                        return equiv_table->equiv_cpu;
+        }
+
+        return 0;
+}
+
+/*
+ * This scans the ucode blob for the proper container as we can have multiple
+ * containers glued together. Returns the equivalence ID from the equivalence
+ * table or 0 if none found.
+ * Returns the amount of bytes consumed while scanning. @desc contains all the
+ * data we're going to use in later stages of the application.
+ */
+static ssize_t
+parse_container(uint8* ucode, ssize_t size, struct cont_desc* desc)
+{
+        struct equiv_cpu_entry* eq;
+        ssize_t orig_size = size;
+        uint32* hdr = (uint32*) ucode;
+        uint16 eq_id;
+        uint8* buf;
+
+        /* Am I looking at an equivalence table header? */
+        if (hdr[0] != UCODE_MAGIC ||
+            hdr[1] != UCODE_EQUIV_CPU_TABLE_TYPE ||
+            hdr[2] == 0)
+                return CONTAINER_HDR_SZ;
+
+        buf = ucode;
+
+        eq = (struct equiv_cpu_entry*)(buf + CONTAINER_HDR_SZ);
+
+        /* Find the equivalence ID of our CPU in this table: */
+        eq_id = find_equiv_id(eq, desc->cpuid_1_eax);
+
+        buf  += hdr[2] + CONTAINER_HDR_SZ;
+        size -= hdr[2] + CONTAINER_HDR_SZ;
+
+        /*
+         * Scan through the rest of the container to find where it ends. We do
+          some basic sanity-checking too.
+         */
+        while (size > 0) {
+                struct microcode_amd *mc;
+                uint32 patch_size;
+
+                hdr = (uint32 *)buf;
+
+                if (hdr[0] != UCODE_UCODE_TYPE)
+                        break;
+
+                /* Sanity-check patch size. */
+                patch_size = hdr[1];
+                if (patch_size > PATCH_MAX_SIZE)
+                        break;
+
+                /* Skip patch section header: */
+                buf  += SECTION_HDR_SIZE;
+                size -= SECTION_HDR_SIZE;
+
+                mc = (struct microcode_amd *)buf;
+                if (eq_id == mc->hdr.processor_rev_id) {
+                        desc->psize = patch_size;
+                        desc->mc = mc;
+                }
+
+                buf  += patch_size;
+                size -= patch_size;
+        }
+
+        /*
+         * If we have found a patch (desc->mc), it means we're looking at the
+         * container which has a patch for this CPU so return 0 to mean, @ucode
+         * already points to the proper container. Otherwise, we return the size
+         * we scanned so that we can advance to the next container in the
+         * buffer.
+         */
+        if (desc->mc) {
+                desc->data = ucode;
+                desc->size = orig_size - size;
+
+                return 0;
+        }
+
+        return orig_size - size;
+}
+
+/*
+ * Scan the ucode blob for the proper container as we can have multiple
+ * containers glued together.
+ */
+static void
+scan_containers(uint8* ucode, size_t size, struct cont_desc* desc)
+{
+        ssize_t rem = size;
+
+        while (rem >= 0) {
+                ssize_t s = parse_container(ucode, rem, desc);
+                if (!s)
+                        return;
+
+                ucode += s;
+                rem   -= s;
+        }
+}
+
+status_t
+arch_cpu_load_microcode()
+{
+        cpu_ent* cpu = get_cpu_struct();
+
+	// TODO: Extend to Intel as well, and all AMD variants.
+        if (cpu->arch.vendor != VENDOR_AMD)
+                return B_OK;
+
+	// Currently only AMD 15h family is supported.
+	if (cpu->arch.family == 0xf && cpu->arch.extended_family == 6) {
+		dprintf("microcode: Obtaining AMD microcode update\n");
+
+		cpuid_info cpuid;
+		get_current_cpuid(&cpuid, 1, 0);
+
+		struct cont_desc desc = { 0 };
+		desc.cpuid_1_eax = cpuid.regs.eax;
+		scan_containers((uint8*) gMicrocode_amd_15h, gMicrocodeSize_amd_15h, &desc);
+		struct microcode_amd *mc = desc.mc;
+		if (!mc) {
+			dprintf("microcode: Failed to extract AMD microcode update. This should not happen!\n");
+			return B_ERROR;
+		}
+
+		dprintf("microcode: Successfully extracted AMD microcode firmware: patch_id: %d, processor_rev_id %d\n", mc->hdr.patch_id, mc->hdr.processor_rev_id);
+
+		uint32 rev = (uint32) x86_read_msr(MSR_AMD64_PATCH_LEVEL);
+		dprintf("microcode: Currently loaded revision %d\n", rev);
+
+		if (rev >= mc->hdr.patch_id) {
+			dprintf("microcode: No need to patch, microcode is using the newest available revision\n");
+			return B_OK;
+		}
+
+		x86_write_msr(MSR_AMD64_PATCH_LOADER, (uint64)(long)&mc->hdr.data_code);
+
+		rev = (uint32) x86_read_msr(MSR_AMD64_PATCH_LEVEL);
+		if (rev != mc->hdr.patch_id) {
+			dprintf("microcode: Patching microcode failed, expecting revision %d, but got %d\n", mc->hdr.patch_id, rev);
+			return B_OK;
+		}
+
+		dprintf("microcode: Successfully patched microcode to revision %d, from previous %d\n", mc->hdr.patch_id, rev);
+	}
+
+	return B_OK;
+}
