CPU_VGACNTRL (0x00041000): 0x80000000 Gen5 disabled PORT_DBG (0x00042308): 0x00000000 Gen5 HW DRRS off DIGITAL_PORT_HOTPLUG_CNTRL (0x00044030): 0x00000010 FDI_PLL_BIOS_0 (0x00046000): 0xffffffff FDI_PLL_BIOS_1 (0x00046004): 0xffffffff FDI_PLL_BIOS_2 (0x00046008): 0xffffffff DISPLAY_PORT_PLL_BIOS_0 (0x0004600c): 0xffffffff DISPLAY_PORT_PLL_BIOS_1 (0x00046010): 0xffffffff DISPLAY_PORT_PLL_BIOS_2 (0x00046014): 0xffffffff FDI_PLL_FREQ_CTL (0x00046030): 0xffffffff BLC_PWM_CPU_CTL2 (0x00048250): 0x80000000 Gen5 enable 1, pipe A, blinking 0, granularity 128 Gen7.5 enable 1, pipe A, blinking 0, granularity 128 BLC_PWM_CPU_CTL (0x00048254): 0x0000007e Gen5 cycle 126, freq 0 Gen7.5 cycle 126, freq 0 HTOTAL_A (0x00060000): 0x06df063f Gen2 1600 active, 1760 total Gen5 1600 active, 1760 total Gen7.5 1600 active, 1760 total HBLANK_A (0x00060004): 0x06df063f Gen2 1600 start, 1760 end Gen5 1600 start, 1760 end Gen7.5 1600 start, 1760 end HSYNC_A (0x00060008): 0x068f066f Gen2 1648 start, 1680 end Gen5 1648 start, 1680 end Gen7.5 1648 start, 1680 end VTOTAL_A (0x0006000c): 0x039d0383 Gen2 900 active, 926 total Gen5 900 active, 926 total Gen7.5 900 active, 926 total VBLANK_A (0x00060010): 0x039d0383 Gen2 900 start, 926 end Gen5 900 start, 926 end Gen7.5 900 start, 926 end VSYNC_A (0x00060014): 0x038b0386 Gen2 903 start, 908 end Gen5 903 start, 908 end Gen7.5 903 start, 908 end PIPEASRC (0x0006001c): 0x063f0383 Gen2 1600, 900 Gen5 1600, 900 Gen7.5 1600, 900 VSYNCSHIFT_A (0x00060028): 0x00000000 PIPEA_DATA_M1 (0x00060030): 0x7e34263a Gen5 TU 64, val 0x34263a 3417658 Gen7.5 TU 64, val 0x34263a 3417658 PIPEA_DATA_N1 (0x00060034): 0x00400000 Gen5 val 0x400000 4194304 Gen7.5 val 0x400000 4194304 PIPEA_DATA_M2 (0x00060038): 0x00000000 Gen5 TU 1, val 0x0 0 PIPEA_DATA_N2 (0x0006003c): 0x00000000 Gen5 val 0x0 0 PIPEA_LINK_M1 (0x00060040): 0x0002e5ad Gen5 val 0x2e5ad 189869 Gen7.5 val 0x2e5ad 189869 PIPEA_LINK_N1 (0x00060044): 0x00080000 Gen5 val 0x80000 524288 Gen7.5 val 0x80000 524288 PIPEA_LINK_M2 (0x00060048): 0x00000000 Gen5 val 0x0 0 PIPEA_LINK_N2 (0x0006004c): 0x00000000 Gen5 val 0x0 0 FDI_TXA_CTL (0x00060100): 0x00040000 Gen5 disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable HTOTAL_B (0x00061000): 0x00000000 Gen2 1 active, 1 total Gen5 1 active, 1 total Gen7.5 1 active, 1 total HBLANK_B (0x00061004): 0x00000000 Gen2 1 start, 1 end Gen5 1 start, 1 end Gen7.5 1 start, 1 end HSYNC_B (0x00061008): 0x00000000 Gen2 1 start, 1 end Gen5 1 start, 1 end Gen7.5 1 start, 1 end VTOTAL_B (0x0006100c): 0x00000000 Gen2 1 active, 1 total Gen5 1 active, 1 total Gen7.5 1 active, 1 total VBLANK_B (0x00061010): 0x00000000 Gen2 1 start, 1 end Gen5 1 start, 1 end Gen7.5 1 start, 1 end VSYNC_B (0x00061014): 0x00000000 Gen2 1 start, 1 end Gen5 1 start, 1 end Gen7.5 1 start, 1 end PIPEBSRC (0x0006101c): 0x00000000 Gen2 1, 1 Gen5 1, 1 Gen7.5 1, 1 VSYNCSHIFT_B (0x00061028): 0x00000000 PIPEB_DATA_M1 (0x00061030): 0x00000000 Gen5 TU 1, val 0x0 0 Gen7.5 TU 1, val 0x0 0 PIPEB_DATA_N1 (0x00061034): 0x00000000 Gen5 val 0x0 0 Gen7.5 val 0x0 0 PIPEB_DATA_M2 (0x00061038): 0x00000000 Gen5 TU 1, val 0x0 0 PIPEB_DATA_N2 (0x0006103c): 0x00000000 Gen5 val 0x0 0 PIPEB_LINK_M1 (0x00061040): 0x00000000 Gen5 val 0x0 0 Gen7.5 val 0x0 0 PIPEB_LINK_N1 (0x00061044): 0x00000000 Gen5 val 0x0 0 Gen7.5 val 0x0 0 PIPEB_LINK_M2 (0x00061048): 0x00000000 Gen5 val 0x0 0 PIPEB_LINK_N2 (0x0006104c): 0x00000000 Gen5 val 0x0 0 FDI_TXB_CTL (0x00061100): 0x00040000 Gen2 disabled, pipe A, -hsync, -vsync Gen5 disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing enable, FDI PLL disable, scrambing enable, master mode disable HTOTAL_C (0x00062000): 0x00000000 Gen5 1 active, 1 total Gen7.5 1 active, 1 total HBLANK_C (0x00062004): 0x00000000 Gen5 1 start, 1 end Gen7.5 1 start, 1 end HSYNC_C (0x00062008): 0x00000000 Gen5 1 start, 1 end Gen7.5 1 start, 1 end VTOTAL_C (0x0006200c): 0x00000000 Gen5 1 active, 1 total Gen7.5 1 active, 1 total VBLANK_C (0x00062010): 0x00000000 Gen5 1 start, 1 end Gen7.5 1 start, 1 end VSYNC_C (0x00062014): 0x00000000 Gen5 1 start, 1 end Gen7.5 1 start, 1 end PIPECSRC (0x0006201c): 0x00000000 Gen5 1, 1 Gen7.5 1, 1 VSYNCSHIFT_C (0x00062028): 0x00000000 PIPEC_DATA_M1 (0x00062030): 0x00000000 Gen5 TU 1, val 0x0 0 Gen7.5 TU 1, val 0x0 0 PIPEC_DATA_N1 (0x00062034): 0x00000000 Gen5 val 0x0 0 Gen7.5 val 0x0 0 PIPEC_DATA_M2 (0x00062038): 0x00000000 Gen5 TU 1, val 0x0 0 PIPEC_DATA_N2 (0x0006203c): 0x00000000 Gen5 val 0x0 0 PIPEC_LINK_M1 (0x00062040): 0x00000000 Gen5 val 0x0 0 Gen7.5 val 0x0 0 PIPEC_LINK_N1 (0x00062044): 0x00000000 Gen5 val 0x0 0 Gen7.5 val 0x0 0 PIPEC_LINK_M2 (0x00062048): 0x00000000 Gen5 val 0x0 0 PIPEC_LINK_N2 (0x0006204c): 0x00000000 Gen5 val 0x0 0 FDI_TXC_CTL (0x00062100): 0x00000000 Gen5 disable, train pattern pattern_1, voltage swing 0.4V,pre-emphasis none, port width X1, enhanced framing disable, FDI PLL disable, scrambing enable, master mode disable CPU_eDP_A (0x00064000): 0xb0044004 Gen7.5 enabled not reversed reserved not detected PFA_WIN_POS (0x00068070): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PFA_WIN_SIZE (0x00068074): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PFA_CTL_1 (0x00068080): 0x00000000 Gen5 disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1 Gen7.5 disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1 PFA_CTL_2 (0x00068084): 0x00007e3e Gen5 vscale 0.986267 PFA_CTL_3 (0x00068088): 0x00003f1f Gen5 vscale initial phase 0.493134 PFA_CTL_4 (0x00068090): 0x00007ce0 Gen5 hscale 0.975586 PFB_WIN_POS (0x00068870): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PFB_WIN_SIZE (0x00068874): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PFB_CTL_1 (0x00068880): 0x00000000 Gen5 disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1 Gen7.5 disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1 PFB_CTL_2 (0x00068884): 0x00000000 Gen5 vscale 0.000000 PFB_CTL_3 (0x00068888): 0x00000000 Gen5 vscale initial phase 0.000000 PFB_CTL_4 (0x00068890): 0x00000000 Gen5 hscale 0.000000 PFC_WIN_POS (0x00069070): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PFC_WIN_SIZE (0x00069074): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PFC_CTL_1 (0x00069080): 0x00000000 Gen5 disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1 Gen7.5 disable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1 PFC_CTL_2 (0x00069084): 0x00000000 Gen5 vscale 0.000000 PFC_CTL_3 (0x00069088): 0x00000000 Gen5 vscale initial phase 0.000000 PFC_CTL_4 (0x00069090): 0x00000000 Gen5 hscale 0.000000 PIPEACONF (0x00070008): 0xc0000050 Gen2 enabled, active Gen5 enabled, active Gen7.5 enabled, active DSPACNTR (0x00070180): 0xd8004400 Gen2 enabled, pipe A Gen5 enabled, pipe A Gen7.5 enabled, pipe A DSPABASE (0x00070184): 0x00000000 DSPASTRIDE (0x00070188): 0x00001a00 Gen2 6656 bytes Gen5 104 Gen7.5 104 DSPASURF (0x0007019c): 0x00b10000 DSPATILEOFF (0x000701a4): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PIPEBCONF (0x00071008): 0x00000000 Gen2 disabled, inactive Gen5 disabled, inactive Gen7.5 disabled, inactive DSPBCNTR (0x00071180): 0x00004000 Gen2 disabled, pipe A Gen5 disabled, pipe A Gen7.5 disabled, pipe A DSPBBASE (0x00071184): 0x00000000 DSPBSTRIDE (0x00071188): 0x00000000 Gen2 0 bytes Gen5 0 Gen7.5 0 DSPBSURF (0x0007119c): 0x00000000 DSPBTILEOFF (0x000711a4): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PIPECCONF (0x00072008): 0x00000000 Gen5 disabled, inactive Gen7.5 disabled, inactive DSPCCNTR (0x00072180): 0x00000000 Gen5 disabled, pipe A Gen7.5 disabled, pipe A DSPCBASE (0x00072184): 0x00000000 DSPCSTRIDE (0x00072188): 0x00000000 Gen5 0 Gen7.5 0 DSPCSURF (0x0007219c): 0x00000000 DSPCTILEOFF (0x000721a4): 0x00000000 Gen5 0, 0 Gen7.5 0, 0 PCH_DPLL_A (0x000c6014): 0x04800080 Gen5 disable, sdvo high speed no, mode Non-LVDS, p2 Div 10, FPA0 P1 8, FPA1 P1 8, refclk default 120Mhz, sdvo/hdmi mul 1 PCH_DPLL_B (0x000c6018): 0x04800080 Gen5 disable, sdvo high speed no, mode Non-LVDS, p2 Div 10, FPA0 P1 8, FPA1 P1 8, refclk default 120Mhz, sdvo/hdmi mul 1 PCH_FPA0 (0x000c6040): 0x00030d07 Gen5 n = 3, m1 = 13, m2 = 7 PCH_FPA1 (0x000c6044): 0x00030d07 Gen5 n = 3, m1 = 13, m2 = 7 PCH_FPB0 (0x000c6048): 0x00030d07 Gen5 n = 3, m1 = 13, m2 = 7 PCH_FPB1 (0x000c604c): 0x00030d07 Gen5 n = 3, m1 = 13, m2 = 7 PCH_DREF_CONTROL (0x000c6200): 0x00007400 Gen5 cpu source nonspread, ssc_source enable, nonspread_source enable, superspread_source disable, ssc4_mode downspread, ssc1 disable, ssc4 disable PCH_RAWCLK_FREQ (0x000c6204): 0x0000007d Gen5 FDL_TP1 timer 0.5us, FDL_TP2 timer 1.5us, freq 125 PCH_DPLL_TMR_CFG (0x000c6208): 0x0271186a PCH_SSC4_PARMS (0x000c6210): 0x01204860 PCH_SSC4_AUX_PARMS (0x000c6214): 0x000029c5 PCH_DPLL_ANALOG_CTL (0x000c6300): 0x00008000 PCH_DPLL_SEL (0x000c7000): 0x00000000 PCH_PP_STATUS (0x000c7200): 0x80000008 Gen5 on, not ready, sequencing idle Gen7.5 on, not ready, sequencing idle PCH_PP_CONTROL (0x000c7204): 0xabcd0007 Gen5 blacklight enabled, power down on reset, panel on Gen7.5 blacklight enabled, power down on reset, panel on PCH_PP_ON_DELAYS (0x000c7208): 0x47d00001 PCH_PP_OFF_DELAYS (0x000c720c): 0x01f40001 PCH_PP_DIVISOR (0x000c7210): 0x00186906 BLC_PWM_PCH_CTL1 (0x000c8250): 0x80000000 Gen5 enable 1, override 0, inverted polarity 0 Gen7.5 enable 1, override 0, inverted polarity 0 BLC_PWM_PCH_CTL2 (0x000c8254): 0x03d00000 Gen5 freq 976, cycle 0 Gen7.5 freq 976, cycle 0 TRANS_HTOTAL_A (0x000e0000): 0x00000000 Gen5 1 active, 1 total Gen7.5 1 active, 1 total TRANS_HBLANK_A (0x000e0004): 0x00000000 Gen5 1 start, 1 end Gen7.5 1 start, 1 end TRANS_HSYNC_A (0x000e0008): 0x00000000 Gen5 1 start, 1 end Gen7.5 1 start, 1 end TRANS_VTOTAL_A (0x000e000c): 0x00000000 Gen5 1 active, 1 total Gen7.5 1 active, 1 total TRANS_VBLANK_A (0x000e0010): 0x00000000 Gen5 1 start, 1 end Gen7.5 1 start, 1 end TRANS_VSYNC_A (0x000e0014): 0x00000000 Gen5 1 start, 1 end Gen7.5 1 start, 1 end TRANS_VSYNCSHIFT_A (0x000e0028): 0x00000000 TRANSA_DATA_M1 (0x000e0030): 0x00000000 Gen5 TU 1, val 0x0 0 TRANSA_DATA_N1 (0x000e0034): 0x00000000 Gen5 val 0x0 0 TRANSA_DATA_M2 (0x000e0038): 0x00000000 Gen5 TU 1, val 0x0 0 TRANSA_DATA_N2 (0x000e003c): 0x00000000 Gen5 val 0x0 0 TRANSA_DP_LINK_M1 (0x000e0040): 0x00000000 Gen5 val 0x0 0 TRANSA_DP_LINK_N1 (0x000e0044): 0x00000000 Gen5 val 0x0 0 TRANSA_DP_LINK_M2 (0x000e0048): 0x00000000 Gen5 val 0x0 0 TRANSA_DP_LINK_N2 (0x000e004c): 0x00000000 Gen5 val 0x0 0 TRANS_DP_CTL_A (0x000e0300): 0x60000418 TRANS_HTOTAL_B (0x000e1000): 0x00000000 Gen5 1 active, 1 total TRANS_HBLANK_B (0x000e1004): 0x00000000 Gen5 1 start, 1 end TRANS_HSYNC_B (0x000e1008): 0x00000000 Gen5 1 start, 1 end TRANS_VTOTAL_B (0x000e100c): 0x00000000 Gen5 1 active, 1 total TRANS_VBLANK_B (0x000e1010): 0x00000000 Gen5 1 start, 1 end TRANS_VSYNC_B (0x000e1014): 0x00000000 Gen5 1 start, 1 end TRANS_VSYNCSHIFT_B (0x000e1028): 0x00000000 TRANSB_DATA_M1 (0x000e1030): 0x00000000 Gen5 TU 1, val 0x0 0 TRANSB_DATA_N1 (0x000e1034): 0x00000000 Gen5 val 0x0 0 TRANSB_DATA_M2 (0x000e1038): 0x00000000 Gen5 TU 1, val 0x0 0 TRANSB_DATA_N2 (0x000e103c): 0x00000000 Gen5 val 0x0 0 TRANSB_DP_LINK_M1 (0x000e1040): 0x00000000 Gen5 val 0x0 0 TRANSB_DP_LINK_N1 (0x000e1044): 0x00000000 Gen5 val 0x0 0 TRANSB_DP_LINK_M2 (0x000e1048): 0x00000000 Gen5 val 0x0 0 TRANSB_DP_LINK_N2 (0x000e104c): 0x00000000 Gen5 val 0x0 0 PCH_ADPA (0x000e1100): 0x00f40000 Gen5 disabled, pipe A, -hsync, -vsync HDMIB (0x000e1140): 0x00000018 Gen5 disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected HDMIC (0x000e1150): 0x0000001c Gen5 disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync detected HDMID (0x000e1160): 0x00000018 Gen5 disabled pipe A 8bpc SDVO DVI audio disabled +vsync +hsync non-detected PCH_LVDS (0x000e1180): 0x00000000 Gen5 disabled, pipe A, 18 bit, 1 channel TRANS_DP_CTL_B (0x000e1300): 0x60000018 TRANS_HTOTAL_C (0x000e2000): 0x00000000 Gen5 1 active, 1 total TRANS_HBLANK_C (0x000e2004): 0x00000000 Gen5 1 start, 1 end TRANS_HSYNC_C (0x000e2008): 0x00000000 Gen5 1 start, 1 end TRANS_VTOTAL_C (0x000e200c): 0x00000000 Gen5 1 active, 1 total TRANS_VBLANK_C (0x000e2010): 0x00000000 Gen5 1 start, 1 end TRANS_VSYNC_C (0x000e2014): 0x00000000 Gen5 1 start, 1 end TRANS_VSYNCSHIFT_C (0x000e2028): 0x00000000 TRANSC_DATA_M1 (0x000e2030): 0x00000000 Gen5 TU 1, val 0x0 0 TRANSC_DATA_N1 (0x000e2034): 0x00000000 Gen5 val 0x0 0 TRANSC_DATA_M2 (0x000e2038): 0x00000000 Gen5 TU 1, val 0x0 0 TRANSC_DATA_N2 (0x000e203c): 0x00000000 Gen5 val 0x0 0 TRANSC_DP_LINK_M1 (0x000e2040): 0x00000000 Gen5 val 0x0 0 TRANSC_DP_LINK_N1 (0x000e2044): 0x00000000 Gen5 val 0x0 0 TRANSC_DP_LINK_M2 (0x000e2048): 0x00000000 Gen5 val 0x0 0 TRANSC_DP_LINK_N2 (0x000e204c): 0x00000000 Gen5 val 0x0 0 TRANS_DP_CTL_C (0x000e2300): 0x60000018 PCH_DP_B (0x000e4100): 0x00000000 PCH_DP_C (0x000e4200): 0x00000004 PCH_DP_D (0x000e4300): 0x00000000 TRANSACONF (0x000f0008): 0x00000000 Gen5 disable, inactive, progressive Gen7.5 disable, inactive, progressive FDI_RXA_CTL (0x000f000c): 0x00020040 Gen5 disable, train pattern pattern_1, port width X1, 6bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk FDI_RXA_MISC (0x000f0010): 0x00000080 Gen5 FDI Delay 128 Gen7.5 FDI Delay 128 FDI_RXA_IIR (0x000f0014): 0x00000000 FDI_RXA_IMR (0x000f0018): 0x00000fff FDI_RXA_TUSIZE1 (0x000f0030): 0x7e000000 FDI_RXA_TUSIZE2 (0x000f0038): 0x7e000000 TRANSBCONF (0x000f1008): 0x00000000 Gen5 disable, inactive, progressive FDI_RXB_CTL (0x000f100c): 0x00000040 Gen5 disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk FDI_RXB_MISC (0x000f1010): 0x00000080 Gen5 FDI Delay 128 FDI_RXB_IIR (0x000f1014): 0x00000000 FDI_RXB_IMR (0x000f1018): 0x00000fff FDI_RXB_TUSIZE1 (0x000f1030): 0x7e000000 FDI_RXB_TUSIZE2 (0x000f1038): 0x7e000000 TRANSCCONF (0x000f2008): 0x00000000 Gen5 disable, inactive, progressive FDI_RXC_CTL (0x000f200c): 0x00000040 Gen5 disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite no, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report disable, FE err report disable,scrambing enable, enhanced framing enable, RawClk FDI_RXC_MISC (0x000f2010): 0x00000080 Gen5 FDI Delay 128 FDI_RXC_TUSIZE1 (0x000f2030): 0x7e000000 FDI_RXC_TUSIZE2 (0x000f2038): 0x7e000000 FDI_PLL_CTL_1 (0x000fe000): 0x7e000000 FDI_PLL_CTL_2 (0x000fe004): 0x7e000000 GFX_MODE (0x00002520): 0x00002a00