From 6a833692e63bbf0cfa86b89dbd9f7def017680d2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20Siejak?= <michal@siejak.pl>
Date: Thu, 29 May 2014 13:28:49 +0200
Subject: [PATCH] Updated FreeBSD rtl81xx network driver with the 10.0 release.
Should fix #10412.
---
.../drivers/network/rtl81xx/dev/mii/rgephy.c | 7 +++-
.../kernel/drivers/network/rtl81xx/dev/re/if_re.c | 45 ++++++++++++++++------
.../kernel/drivers/network/rtl81xx/pci/if_rlreg.h | 11 ++++++
.../compat/freebsd_network/compat/dev/mii/miidevs | 1 +
4 files changed, 51 insertions(+), 13 deletions(-)
diff --git a/src/add-ons/kernel/drivers/network/rtl81xx/dev/mii/rgephy.c b/src/add-ons/kernel/drivers/network/rtl81xx/dev/mii/rgephy.c
index aa919f5..8345f1f 100644
a
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b
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static void rgephy_load_dspcode(struct mii_softc *);
|
90 | 90 | |
91 | 91 | static const struct mii_phydesc rgephys[] = { |
92 | 92 | MII_PHY_DESC(REALTEK, RTL8169S), |
| 93 | MII_PHY_DESC(REALTEK, RTL8251), |
93 | 94 | MII_PHY_END |
94 | 95 | }; |
95 | 96 | |
… |
… |
rgephy_loop(struct mii_softc *sc)
|
406 | 407 | { |
407 | 408 | int i; |
408 | 409 | |
409 | | if (sc->mii_mpd_rev < 2) { |
| 410 | if (sc->mii_mpd_model != MII_MODEL_REALTEK_RTL8251 && |
| 411 | sc->mii_mpd_rev < 2) { |
410 | 412 | PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN); |
411 | 413 | DELAY(1000); |
412 | 414 | } |
… |
… |
rgephy_load_dspcode(struct mii_softc *sc)
|
439 | 441 | { |
440 | 442 | int val; |
441 | 443 | |
442 | | if (sc->mii_mpd_rev >= 2) |
| 444 | if (sc->mii_mpd_model == MII_MODEL_REALTEK_RTL8251 || |
| 445 | sc->mii_mpd_rev >= 2) |
443 | 446 | return; |
444 | 447 | |
445 | 448 | PHY_WRITE(sc, 31, 0x0001); |
diff --git a/src/add-ons/kernel/drivers/network/rtl81xx/dev/re/if_re.c b/src/add-ons/kernel/drivers/network/rtl81xx/dev/re/if_re.c
index 4aada16..99a5438 100644
a
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b
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static const struct rl_type re_devs[] = {
|
181 | 181 | { RT_VENDORID, RT_DEVICEID_8101E, 0, |
182 | 182 | "RealTek 810xE PCIe 10/100baseTX" }, |
183 | 183 | { RT_VENDORID, RT_DEVICEID_8168, 0, |
184 | | "RealTek 8168/8111 B/C/CP/D/DP/E/F PCIe Gigabit Ethernet" }, |
| 184 | "RealTek 8168/8111 B/C/CP/D/DP/E/F/G PCIe Gigabit Ethernet" }, |
185 | 185 | { RT_VENDORID, RT_DEVICEID_8169, 0, |
186 | 186 | "RealTek 8169/8169S/8169SB(L)/8110S/8110SB(L) Gigabit Ethernet" }, |
187 | 187 | { RT_VENDORID, RT_DEVICEID_8169SC, 0, |
… |
… |
static const struct rl_hwrev re_hwrevs[] = {
|
223 | 223 | { RL_HWREV_8402, RL_8169, "8402", RL_MTU }, |
224 | 224 | { RL_HWREV_8105E, RL_8169, "8105E", RL_MTU }, |
225 | 225 | { RL_HWREV_8105E_SPIN1, RL_8169, "8105E", RL_MTU }, |
| 226 | { RL_HWREV_8106E, RL_8169, "8106E", RL_MTU }, |
226 | 227 | { RL_HWREV_8168B_SPIN2, RL_8169, "8168", RL_JUMBO_MTU }, |
227 | 228 | { RL_HWREV_8168B_SPIN3, RL_8169, "8168", RL_JUMBO_MTU }, |
228 | 229 | { RL_HWREV_8168C, RL_8169, "8168C/8111C", RL_JUMBO_MTU_6K }, |
… |
… |
static const struct rl_hwrev re_hwrevs[] = {
|
232 | 233 | { RL_HWREV_8168DP, RL_8169, "8168DP/8111DP", RL_JUMBO_MTU_9K }, |
233 | 234 | { RL_HWREV_8168E, RL_8169, "8168E/8111E", RL_JUMBO_MTU_9K}, |
234 | 235 | { RL_HWREV_8168E_VL, RL_8169, "8168E/8111E-VL", RL_JUMBO_MTU_6K}, |
| 236 | { RL_HWREV_8168EP, RL_8169, "8168EP/8111EP", RL_JUMBO_MTU_9K}, |
235 | 237 | { RL_HWREV_8168F, RL_8169, "8168F/8111F", RL_JUMBO_MTU_9K}, |
| 238 | { RL_HWREV_8168G, RL_8169, "8168G/8111G", RL_JUMBO_MTU_9K}, |
| 239 | { RL_HWREV_8168GU, RL_8169, "8168GU/8111GU", RL_JUMBO_MTU_9K}, |
236 | 240 | { RL_HWREV_8411, RL_8169, "8411", RL_JUMBO_MTU_9K}, |
| 241 | { RL_HWREV_8411B, RL_8169, "8411B", RL_JUMBO_MTU_9K}, |
237 | 242 | { 0, 0, NULL, 0 } |
238 | 243 | }; |
239 | 244 | |
… |
… |
re_attach(device_t dev)
|
1321 | 1326 | SYS_RES_IRQ, &rid, RF_ACTIVE); |
1322 | 1327 | if (sc->rl_irq[i] == NULL) { |
1323 | 1328 | device_printf(dev, |
1324 | | "couldn't llocate IRQ resources for " |
| 1329 | "couldn't allocate IRQ resources for " |
1325 | 1330 | "message %d\n", rid); |
1326 | 1331 | error = ENXIO; |
1327 | 1332 | goto fail; |
… |
… |
re_attach(device_t dev)
|
1347 | 1352 | if ((cap & PCIEM_LINK_CAP_ASPM) != 0) { |
1348 | 1353 | ctl = pci_read_config(dev, sc->rl_expcap + |
1349 | 1354 | PCIER_LINK_CTL, 2); |
1350 | | if ((ctl & 0x0003) != 0) { |
1351 | | ctl &= ~0x0003; |
| 1355 | if ((ctl & PCIEM_LINK_CTL_ASPMC) != 0) { |
| 1356 | ctl &= ~PCIEM_LINK_CTL_ASPMC; |
1352 | 1357 | pci_write_config(dev, sc->rl_expcap + |
1353 | 1358 | PCIER_LINK_CTL, ctl, 2); |
1354 | 1359 | device_printf(dev, "ASPM disabled\n"); |
… |
… |
re_attach(device_t dev)
|
1367 | 1372 | break; |
1368 | 1373 | default: |
1369 | 1374 | device_printf(dev, "Chip rev. 0x%08x\n", hwrev & 0x7c800000); |
| 1375 | sc->rl_macrev = hwrev & 0x00700000; |
1370 | 1376 | hwrev &= RL_TXCFG_HWREV; |
1371 | 1377 | break; |
1372 | 1378 | } |
1373 | | device_printf(dev, "MAC rev. 0x%08x\n", hwrev & 0x00700000); |
| 1379 | device_printf(dev, "MAC rev. 0x%08x\n", sc->rl_macrev); |
1374 | 1380 | while (hw_rev->rl_desc != NULL) { |
1375 | 1381 | if (hw_rev->rl_rev == hwrev) { |
1376 | 1382 | sc->rl_type = hw_rev->rl_type; |
… |
… |
re_attach(device_t dev)
|
1408 | 1414 | case RL_HWREV_8401E: |
1409 | 1415 | case RL_HWREV_8105E: |
1410 | 1416 | case RL_HWREV_8105E_SPIN1: |
| 1417 | case RL_HWREV_8106E: |
1411 | 1418 | sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM | |
1412 | 1419 | RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | |
1413 | 1420 | RL_FLAG_FASTETHER | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD; |
… |
… |
re_attach(device_t dev)
|
1429 | 1436 | sc->rl_flags |= RL_FLAG_MACSLEEP; |
1430 | 1437 | /* FALLTHROUGH */ |
1431 | 1438 | case RL_HWREV_8168C: |
1432 | | if ((hwrev & 0x00700000) == 0x00200000) |
| 1439 | if (sc->rl_macrev == 0x00200000) |
1433 | 1440 | sc->rl_flags |= RL_FLAG_MACSLEEP; |
1434 | 1441 | /* FALLTHROUGH */ |
1435 | 1442 | case RL_HWREV_8168CP: |
… |
… |
re_attach(device_t dev)
|
1455 | 1462 | RL_FLAG_WOL_MANLINK; |
1456 | 1463 | break; |
1457 | 1464 | case RL_HWREV_8168E_VL: |
| 1465 | case RL_HWREV_8168EP: |
1458 | 1466 | case RL_HWREV_8168F: |
| 1467 | case RL_HWREV_8168G: |
1459 | 1468 | case RL_HWREV_8411: |
| 1469 | case RL_HWREV_8411B: |
1460 | 1470 | sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR | |
1461 | 1471 | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | |
1462 | 1472 | RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 | |
1463 | 1473 | RL_FLAG_CMDSTOP_WAIT_TXQ | RL_FLAG_WOL_MANLINK; |
1464 | 1474 | break; |
| 1475 | case RL_HWREV_8168GU: |
| 1476 | if (pci_get_device(dev) == RT_DEVICEID_8101E) { |
| 1477 | /* RTL8106EUS */ |
| 1478 | sc->rl_flags |= RL_FLAG_FASTETHER; |
| 1479 | } else |
| 1480 | sc->rl_flags |= RL_FLAG_JUMBOV2 | RL_FLAG_WOL_MANLINK; |
| 1481 | |
| 1482 | sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR | |
| 1483 | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | |
| 1484 | RL_FLAG_AUTOPAD | RL_FLAG_CMDSTOP_WAIT_TXQ; |
| 1485 | break; |
1465 | 1486 | case RL_HWREV_8169_8110SB: |
1466 | 1487 | case RL_HWREV_8169_8110SBL: |
1467 | 1488 | case RL_HWREV_8169_8110SC: |
… |
… |
re_attach(device_t dev)
|
1632 | 1653 | /* |
1633 | 1654 | * Don't enable TSO by default. It is known to generate |
1634 | 1655 | * corrupted TCP segments(bad TCP options) under certain |
1635 | | * circumtances. |
| 1656 | * circumstances. |
1636 | 1657 | */ |
1637 | 1658 | ifp->if_hwassist &= ~CSUM_TSO; |
1638 | 1659 | ifp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO); |
… |
… |
re_encap(struct rl_softc *sc, struct mbuf **m_head)
|
2784 | 2805 | /* |
2785 | 2806 | * Unconditionally enable IP checksum if TCP or UDP |
2786 | 2807 | * checksum is required. Otherwise, TCP/UDP checksum |
2787 | | * does't make effects. |
| 2808 | * doesn't make effects. |
2788 | 2809 | */ |
2789 | 2810 | if (((*m_head)->m_pkthdr.csum_flags & RE_CSUM_FEATURES) != 0) { |
2790 | 2811 | if ((sc->rl_flags & RL_FLAG_DESCV2) == 0) { |
… |
… |
re_init_locked(struct rl_softc *sc)
|
3247 | 3268 | if ((sc->rl_flags & RL_FLAG_JUMBOV2) != 0) { |
3248 | 3269 | /* |
3249 | 3270 | * For controllers that use new jumbo frame scheme, |
3250 | | * set maximum size of jumbo frame depedning on |
| 3271 | * set maximum size of jumbo frame depending on |
3251 | 3272 | * controller revisions. |
3252 | 3273 | */ |
3253 | 3274 | if (ifp->if_mtu > RL_MTU) |
… |
… |
re_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
|
3332 | 3353 | switch (command) { |
3333 | 3354 | case SIOCSIFMTU: |
3334 | 3355 | if (ifr->ifr_mtu < ETHERMIN || |
3335 | | ifr->ifr_mtu > sc->rl_hwrev->rl_max_mtu) { |
| 3356 | ifr->ifr_mtu > sc->rl_hwrev->rl_max_mtu || |
| 3357 | ((sc->rl_flags & RL_FLAG_FASTETHER) != 0 && |
| 3358 | ifr->ifr_mtu > RL_MTU)) { |
3336 | 3359 | error = EINVAL; |
3337 | 3360 | break; |
3338 | 3361 | } |
… |
… |
re_sysctl_stats(SYSCTL_HANDLER_ARGS)
|
3948 | 3971 | RL_UNLOCK(sc); |
3949 | 3972 | if (i == 0) { |
3950 | 3973 | device_printf(sc->rl_dev, |
3951 | | "DUMP statistics request timedout\n"); |
| 3974 | "DUMP statistics request timed out\n"); |
3952 | 3975 | return (ETIMEDOUT); |
3953 | 3976 | } |
3954 | 3977 | done: |
diff --git a/src/add-ons/kernel/drivers/network/rtl81xx/pci/if_rlreg.h b/src/add-ons/kernel/drivers/network/rtl81xx/pci/if_rlreg.h
index 7822ce3..13a111a 100644
a
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b
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|
189 | 189 | #define RL_HWREV_8105E 0x40800000 |
190 | 190 | #define RL_HWREV_8105E_SPIN1 0x40C00000 |
191 | 191 | #define RL_HWREV_8402 0x44000000 |
| 192 | #define RL_HWREV_8106E 0x44800000 |
192 | 193 | #define RL_HWREV_8168F 0x48000000 |
193 | 194 | #define RL_HWREV_8411 0x48800000 |
| 195 | #define RL_HWREV_8168G 0x4C000000 |
| 196 | #define RL_HWREV_8168EP 0x50000000 |
| 197 | #define RL_HWREV_8168GU 0x50800000 |
| 198 | #define RL_HWREV_8411B 0x5C800000 |
194 | 199 | #define RL_HWREV_8139 0x60000000 |
195 | 200 | #define RL_HWREV_8139A 0x70000000 |
196 | 201 | #define RL_HWREV_8139AG 0x70800000 |
… |
… |
struct rl_softc {
|
877 | 882 | bus_dma_tag_t rl_parent_tag; |
878 | 883 | uint8_t rl_type; |
879 | 884 | const struct rl_hwrev *rl_hwrev; |
| 885 | uint32_t rl_macrev; |
880 | 886 | int rl_eecmd_read; |
881 | 887 | int rl_eewidth; |
882 | 888 | int rl_expcap; |
… |
… |
struct rl_softc {
|
1048 | 1054 | #define DLINK_DEVICEID_530TXPLUS 0x1300 |
1049 | 1055 | |
1050 | 1056 | /* |
| 1057 | * D-Link DFE-520TX rev. C1 device ID |
| 1058 | */ |
| 1059 | #define DLINK_DEVICEID_520TX_REVC1 0x4200 |
| 1060 | |
| 1061 | /* |
1051 | 1062 | * D-Link DFE-5280T device ID |
1052 | 1063 | */ |
1053 | 1064 | #define DLINK_DEVICEID_528T 0x4300 |
diff --git a/src/libs/compat/freebsd_network/compat/dev/mii/miidevs b/src/libs/compat/freebsd_network/compat/dev/mii/miidevs
index 24662f9..431bcd8 100644
a
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b
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model yyREALTEK RTL8201L 0x0020 RTL8201L 10/100 media interface
|
299 | 299 | model xxREALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 1000BASE-T media interface |
300 | 300 | model REALTEK RTL8305SC 0x0005 RTL8305SC 10/100 802.1q switch |
301 | 301 | model REALTEK RTL8201E 0x0008 RTL8201E 10/100 media interface |
| 302 | model REALTEK RTL8251 0x0000 RTL8251 1000BASE-T media interface |
302 | 303 | model REALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 1000BASE-T media interface |
303 | 304 | |
304 | 305 | /* Seeq Seeq PHYs */ |