Ticket #1590: if_bgereg.update.diff

/home/adi/xs/sterownik-bge/

@@ -30 +30 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  *
- * $FreeBSD: src/sys/dev/bge/if_bgereg.h,v 1.73 2007/05/22 19:22:58 jkim Exp $
+ * $FreeBSD: src/sys/dev/bge/if_bgereg.h,v 1.73.2.4 2008/06/27 03:24:54 jhb Exp $
  */
 
 /*
@@ -277 +277 @@
 #define BGE_CHIPID_BCM5755_A0       0xa0000000
 #define BGE_CHIPID_BCM5755_A1       0xa0010000
 #define BGE_CHIPID_BCM5755_A2       0xa0020000
+#define BGE_CHIPID_BCM5722_A0           0xa2000000
 #define BGE_CHIPID_BCM5754_A0       0xb0000000
 #define BGE_CHIPID_BCM5754_A1       0xb0010000
 #define BGE_CHIPID_BCM5754_A2       0xb0020000
 #define BGE_CHIPID_BCM5787_A0       0xb0000000
 #define BGE_CHIPID_BCM5787_A1       0xb0010000
 #define BGE_CHIPID_BCM5787_A2       0xb0020000
+#define BGE_CHIPID_BCM5906_A1           0xc0010000
+#define BGE_CHIPID_BCM5906_A2           0xc0020000
 
 /* shorthand one */
 #define BGE_ASICREV(x)          ((x) >> 28)
@@ -299 +302 @@
 #define BGE_ASICREV_BCM5755     0x0a
 #define BGE_ASICREV_BCM5754     0x0b
 #define BGE_ASICREV_BCM5787     0x0b
+#define BGE_ASICREV_BCM5906             0x0c
 
 /* chip revisions */
 #define BGE_CHIPREV(x)          ((x) >> 24)
@@ -1438 +1442 @@
 #define BGE_RXCPUSTAT_MA_REQ_FIFOOFLOW  0x40000000
 #define BGE_RXCPUSTAT_BLOCKING_READ 0x80000000
 
+/*
+ * V? CPU registers
+ */
+#define BGE_VCPU_STATUS                 0x5100
+#define BGE_VCPU_EXT_CTRL               0x6890
+
+#define BGE_VCPU_STATUS_INIT_DONE       0x04000000
+#define BGE_VCPU_STATUS_DRV_RESET       0x08000000
+
+#define BGE_VCPU_EXT_CTRL_HALT_CPU      0x00400000
+#define BGE_VCPU_EXT_CTRL_DISABLE_WOL   0x20000000
 
 /*
  * TX CPU registers
@@ -1684 +1699 @@
 #define BGE_EE_DELAY            0x6848
 #define BGE_FASTBOOT_PC         0x6894
 
+/*
+ * NVRAM Control registers
+ */
+#define BGE_NVRAM_CMD                   0x7000
+#define BGE_NVRAM_STAT                  0x7004
+#define BGE_NVRAM_WRDATA                0x7008
+#define BGE_NVRAM_ADDR                  0x700c
+#define BGE_NVRAM_RDDATA                0x7010
+#define BGE_NVRAM_CFG1                  0x7014
+#define BGE_NVRAM_CFG2                  0x7018
+#define BGE_NVRAM_CFG3                  0x701c
+#define BGE_NVRAM_SWARB                 0x7020
+#define BGE_NVRAM_ACCESS                0x7024
+#define BGE_NVRAM_WRITE1                0x7028
+
+#define BGE_NVRAMCMD_RESET              0x00000001
+#define BGE_NVRAMCMD_DONE               0x00000008
+#define BGE_NVRAMCMD_START              0x00000010
+#define BGE_NVRAMCMD_WR                 0x00000020 /* 1 = wr, 0 = rd */
+#define BGE_NVRAMCMD_ERASE              0x00000040
+#define BGE_NVRAMCMD_FIRST              0x00000080
+#define BGE_NVRAMCMD_LAST               0x00000100
+
+#define BGE_NVRAM_READCMD \
+        (BGE_NVRAMCMD_FIRST|BGE_NVRAMCMD_LAST| \
+        BGE_NVRAMCMD_START|BGE_NVRAMCMD_DONE)
+#define BGE_NVRAM_WRITECMD \
+        (BGE_NVRAMCMD_FIRST|BGE_NVRAMCMD_LAST| \
+        BGE_NVRAMCMD_START|BGE_NVRAMCMD_DONE|BGE_NVRAMCMD_WR)
+
+#define BGE_NVRAMSWARB_SET0             0x00000001
+#define BGE_NVRAMSWARB_SET1             0x00000002
+#define BGE_NVRAMSWARB_SET2             0x00000003
+#define BGE_NVRAMSWARB_SET3             0x00000004
+#define BGE_NVRAMSWARB_CLR0             0x00000010
+#define BGE_NVRAMSWARB_CLR1             0x00000020
+#define BGE_NVRAMSWARB_CLR2             0x00000040
+#define BGE_NVRAMSWARB_CLR3             0x00000080
+#define BGE_NVRAMSWARB_GNT0             0x00000100
+#define BGE_NVRAMSWARB_GNT1             0x00000200
+#define BGE_NVRAMSWARB_GNT2             0x00000400
+#define BGE_NVRAMSWARB_GNT3             0x00000800
+#define BGE_NVRAMSWARB_REQ0             0x00001000
+#define BGE_NVRAMSWARB_REQ1             0x00002000
+#define BGE_NVRAMSWARB_REQ2             0x00004000
+#define BGE_NVRAMSWARB_REQ3             0x00008000
+
+#define BGE_NVRAMACC_ENABLE             0x00000001
+#define BGE_NVRAMACC_WRENABLE           0x00000002
+
 /* Mode control register */
 #define BGE_MODECTL_INT_SNDCOAL_ONLY    0x00000001
 #define BGE_MODECTL_BYTESWAP_NONFRAME   0x00000002
@@ -1711 +1776 @@
 /* Misc. config register */
 #define BGE_MISCCFG_RESET_CORE_CLOCKS   0x00000001
 #define BGE_MISCCFG_TIMER_PRESCALER 0x000000FE
+#define BGE_MISCCFG_BOARD_ID            0x0001E000
+#define BGE_MISCCFG_BOARD_ID_5788       0x00010000
+#define BGE_MISCCFG_BOARD_ID_5788M      0x00018000
+#define BGE_MISCCFG_EPHY_IDDQ           0x00200000
 
 #define BGE_32BITTIME_66MHZ     (0x41 << 1)
 
@@ -2011 +2080 @@
 #define BCOM_DEVICEID_BCM5715S      0x1679
 #define BCOM_DEVICEID_BCM5720       0x1658
 #define BCOM_DEVICEID_BCM5721       0x1659
+#define BCOM_DEVICEID_BCM5722           0x165A
 #define BCOM_DEVICEID_BCM5750       0x1676
 #define BCOM_DEVICEID_BCM5750M      0x167C
 #define BCOM_DEVICEID_BCM5751       0x1677
@@ -2037 +2107 @@
 #define BCOM_DEVICEID_BCM5901       0x170D
 #define BCOM_DEVICEID_BCM5901A2     0x170E
 #define BCOM_DEVICEID_BCM5903M      0x16FF
+#define BCOM_DEVICEID_BCM5906           0x1712
+#define BCOM_DEVICEID_BCM5906M          0x1713
 
 /*
  * Alteon AceNIC PCI vendor/device ID.
@@ -2090 +2162 @@
  * Offset of MAC address inside EEPROM.
  */
 #define BGE_EE_MAC_OFFSET       0x7C
+#define BGE_EE_MAC_OFFSET_5906          0x10
 #define BGE_EE_HWCFG_OFFSET     0xC8
 
 #define BGE_HWCFG_VOLTAGE       0x00000003
@@ -2458 +2531 @@
     uint32_t        bge_flags;
 #define BGE_FLAG_TBI        0x00000001
 #define BGE_FLAG_JUMBO      0x00000002
-#define BGE_FLAG_EEPROM     0x00000004
+#define BGE_FLAG_WIRESPEED      0x00000004
+#define BGE_FLAG_EADDR          0x00000008
 #define BGE_FLAG_MSI        0x00000100
 #define BGE_FLAG_PCIX       0x00000200
 #define BGE_FLAG_PCIE       0x00000400
@@ -2474 +2548 @@
 #define BGE_FLAG_BER_BUG    0x02000000
 #define BGE_FLAG_ADJUST_TRIM    0x04000000
 #define BGE_FLAG_CRC_BUG    0x08000000
+#define BGE_FLAG_5788           0x20000000
     uint32_t        bge_chipid;
     uint8_t         bge_asicrev;
     uint8_t         bge_chiprev;
@@ -2514 +2589 @@
 #define BGE_LOCK_ASSERT(_sc)    mtx_assert(&(_sc)->bge_mtx, MA_OWNED)
 #define BGE_UNLOCK(_sc)     mtx_unlock(&(_sc)->bge_mtx)
 #define BGE_LOCK_DESTROY(_sc)   mtx_destroy(&(_sc)->bge_mtx)
+