| 1 | Index: src/add-ons/kernel/bus_managers/firewire/fwohci_pci.c
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| 2 | ===================================================================
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| 3 | --- src/add-ons/kernel/bus_managers/firewire/fwohci_pci.c (revision 25566)
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| 4 | +++ src/add-ons/kernel/bus_managers/firewire/fwohci_pci.c (working copy)
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| 5 | @@ -57,10 +57,13 @@
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| 6 | #include "fwohcireg.h"
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| 7 | #include "fwohcivar.h"
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| 8 |
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| 9 | +#define PCIM_CMD_IOS 0x0001
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| 10 | #define PCIM_CMD_MEMEN 0x0002
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| 11 | #define PCIM_CMD_BUSMASTEREN 0x0004
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| 12 | #define PCIM_CMD_MWRICEN 0x0010
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| 13 | -#define PCIM_CMD_IOS 0x0001
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| 14 | +#define PCIM_CMD_PERRESPEN 0x0040
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| 15 | +#define PCIM_CMD_SERRESPEN 0x0100
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| 16 | +
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| 17 | extern pci_module_info *gPci;
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| 18 | extern pci_info *pciInfo[MAX_CARDS];
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| 19 | extern fwohci_softc_t *gFwohci_softc[MAX_CARDS];
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| 20 | @@ -149,6 +152,7 @@
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| 21 |
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| 22 | #if 1 /* for broken hardware */
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| 23 | val &= ~PCIM_CMD_MWRICEN;
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| 24 | + val &= ~(PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN);
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| 25 | #endif
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| 26 | gPci->write_pci_config(info->bus, info->device, info->function,
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| 27 | PCI_command, 2, val);
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| 28 | Index: src/add-ons/kernel/bus_managers/firewire/fwohci.c
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| 29 | ===================================================================
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| 30 | --- src/add-ons/kernel/bus_managers/firewire/fwohci.c (revision 25566)
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| 31 | +++ src/add-ons/kernel/bus_managers/firewire/fwohci.c (working copy)
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| 32 | @@ -412,7 +412,7 @@
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| 33 | * number of port supported by core-logic.
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| 34 | * It is not actually available port on your PC .
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| 35 | */
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| 36 | - OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LPS);
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| 37 | + OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LPS | OHCI_HCC_POSTWR);
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| 38 | DELAY(500);
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| 39 |
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| 40 | reg = fwphy_rddata(sc, FW_PHY_SPD_REG);
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| 41 | @@ -706,10 +706,10 @@
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| 42 | sc->sid_buf = sc->sid_dma.v_addr = buf_virt;
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| 43 | sc->sid_dma.bus_addr = (bus_addr_t)buf_phy;
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| 44 | sc->fc.config_rom = sc->crom_dma.v_addr = buf_virt + OHCI_SIDSIZE;
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| 45 | - sc->crom_dma.bus_addr = (bus_addr_t)((char *)buf_phy + OHCI_SIDSIZE);
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| 46 | - sc->dummy_dma.v_addr = (char *)buf_virt + OHCI_SIDSIZE + sizeof(uint32_t);
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| 47 | - sc->dummy_dma.bus_addr = (bus_addr_t)((char *)buf_phy +
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| 48 | - OHCI_SIDSIZE + sizeof(uint32_t));
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| 49 | + sc->crom_dma.bus_addr = (bus_addr_t)(buf_phy + OHCI_SIDSIZE);
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| 50 | + sc->dummy_dma.v_addr = buf_virt + OHCI_SIDSIZE + CROMSIZE;
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| 51 | + sc->dummy_dma.bus_addr = (bus_addr_t)(buf_phy +
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| 52 | + OHCI_SIDSIZE + CROMSIZE);
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| 53 |
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| 54 | fwohci_db_init(sc, &sc->arrq);
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| 55 | if ((sc->arrq.flags & FWOHCI_DBCH_INIT) == 0)
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