Changes between Initial Version and Version 1 of Ticket #12885, comment 22


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Timestamp:
Oct 30, 2016, 3:21:07 PM (8 years ago)
Author:
kallisti5

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  • Ticket #12885, comment 22

    initial v1  
    22
    33{{{
    4 The PCI Configuration space BAR0 and BAR1 fields contain a 64 bit address that points to the base of the xHC PF0 MMIO space. This po inter will be referred to as PBAR0.
     4The PCI Configuration space BAR0 and BAR1 fields contain a 64 bit address that
     5points to the base of the xHC PF0 MMIO space. This po inter will be referred
     6to as PBAR0.
    57}}}
    68