2 | | |
3 | | W.I.P |
4 | | |
5 | | ''ATI'' |
6 | | Drivers : ati[[BR]] |
7 | | static const ChipInfo chipTable[] = { |
8 | | { 0x4742, MACH64_264GTPRO, "3D RAGE PRO, AGP" }, // GB |
9 | | { 0x4744, MACH64_264GTPRO, "3D RAGE PRO, AGP" }, // GD |
10 | | { 0x4749, MACH64_264GTPRO, "3D RAGE PRO, PCI" }, // GI |
11 | | { 0x474C, MACH64_264XL, "3D RAGE XC, PCI" }, // GL |
12 | | { 0x474D, MACH64_264XL, "3D RAGE XL, AGP" }, // GM |
13 | | { 0x474E, MACH64_264XL, "3D RAGE XC, AGP" }, // GN |
14 | | { 0x474F, MACH64_264XL, "3D RAGE XL, PCI" }, // GO |
15 | | { 0x4750, MACH64_264GTPRO, "3D RAGE PRO, PCI" }, // GP |
16 | | { 0x4751, MACH64_264GTPRO, "3D RAGE PRO, PCI" }, // GQ |
17 | | { 0x4752, MACH64_264XL, "3D RAGE XL, PCI" }, // GR |
18 | | { 0x4753, MACH64_264XL, "3D RAGE XC, PCI" }, // GS |
19 | | { 0x4754, MACH64_264GT, "3D RAGE II" }, // GT |
20 | | { 0x4755, MACH64_264GTDVD, "3D RAGE II+" }, // GU |
21 | | { 0x4756, MACH64_264GT2C, "3D RAGE IIC, PCI" }, // GV |
22 | | { 0x4757, MACH64_264GT2C, "3D RAGE IIC, AGP" }, // GW |
23 | | { 0x4759, MACH64_264GT2C, "3D RAGE IIC, PCI" }, // GY |
24 | | { 0x475A, MACH64_264GT2C, "3D RAGE IIC, AGP" }, // GZ |
25 | | { 0x4C42, MACH64_264LTPRO, "3D RAGE LT PRO, AGP" }, // LB |
26 | | { 0x4C44, MACH64_264LTPRO, "3D RAGE LT PRO, AGP" }, // LD |
27 | | { 0x4C47, MACH64_264LT, "3D RAGE LT" }, // LG |
28 | | { 0x4C49, MACH64_264LTPRO, "3D RAGE LT PRO, PCI" }, // LI |
29 | | { 0x4C4D, MACH64_MOBILITY, "3D RAGE Mobility, AGP" }, // LM |
30 | | { 0x4C4E, MACH64_MOBILITY, "3D RAGE Mobility, AGP" }, // LN |
31 | | { 0x4C50, MACH64_264LTPRO, "3D RAGE LT PRO, PCI" }, // LP |
32 | | { 0x4C51, MACH64_264LTPRO, "3D RAGE LT PRO, PCI" }, // LQ |
33 | | { 0x4C52, MACH64_MOBILITY, "3D RAGE Mobility, PCI" }, // LR |
34 | | { 0x4C53, MACH64_MOBILITY, "3D RAGE Mobility, PCI" }, // LS |
35 | | { 0x5654, MACH64_264VT, "264VT2" }, // VT |
36 | | { 0x5655, MACH64_264VT3, "264VT3" }, // VU |
37 | | { 0x5656, MACH64_264VT4, "264VT4" }, // VV |
38 | | |
39 | | { 0x4C45, RAGE128_MOBILITY, "RAGE 128 Mobility 3" }, // LE |
40 | | { 0x4C46, RAGE128_MOBILITY, "RAGE 128 Mobility 3" }, // LF |
41 | | { 0x4D46, RAGE128_MOBILITY, "RAGE 128 Mobility 4" }, // MF |
42 | | { 0x4D4C, RAGE128_MOBILITY, "RAGE 128 Mobility 4" }, // ML |
43 | | { 0x5041, RAGE128_PRO_GL, sRage128_Pro_GL }, // PA |
44 | | { 0x5042, RAGE128_PRO_GL, sRage128_Pro_GL }, // PB |
45 | | { 0x5043, RAGE128_PRO_GL, sRage128_Pro_GL }, // PC |
46 | | { 0x5044, RAGE128_PRO_GL, sRage128_Pro_GL }, // PD |
47 | | { 0x5045, RAGE128_PRO_GL, sRage128_Pro_GL }, // PE |
48 | | { 0x5046, RAGE128_PRO_GL, sRage128_Pro_GL }, // PF |
49 | | { 0x5047, RAGE128_PRO_VR, sRage128_Pro_VR }, // PG |
50 | | { 0x5048, RAGE128_PRO_VR, sRage128_Pro_VR }, // PH |
51 | | { 0x5049, RAGE128_PRO_VR, sRage128_Pro_VR }, // PI |
52 | | { 0x504A, RAGE128_PRO_VR, sRage128_Pro_VR }, // PJ |
53 | | { 0x504B, RAGE128_PRO_VR, sRage128_Pro_VR }, // PK |
54 | | { 0x504C, RAGE128_PRO_VR, sRage128_Pro_VR }, // PL |
55 | | { 0x504D, RAGE128_PRO_VR, sRage128_Pro_VR }, // PM |
56 | | { 0x504E, RAGE128_PRO_VR, sRage128_Pro_VR }, // PN |
57 | | { 0x504F, RAGE128_PRO_VR, sRage128_Pro_VR }, // PO |
58 | | { 0x5050, RAGE128_PRO_VR, sRage128_Pro_VR }, // PP |
59 | | { 0x5051, RAGE128_PRO_VR, sRage128_Pro_VR }, // PQ |
60 | | { 0x5052, RAGE128_PRO_VR, sRage128_Pro_VR }, // PR |
61 | | { 0x5053, RAGE128_PRO_VR, sRage128_Pro_VR }, // PS |
62 | | { 0x5054, RAGE128_PRO_VR, sRage128_Pro_VR }, // PT |
63 | | { 0x5055, RAGE128_PRO_VR, sRage128_Pro_VR }, // PU |
64 | | { 0x5056, RAGE128_PRO_VR, sRage128_Pro_VR }, // PV |
65 | | { 0x5057, RAGE128_PRO_VR, sRage128_Pro_VR }, // PW |
66 | | { 0x5058, RAGE128_PRO_VR, sRage128_Pro_VR }, // PX |
67 | | { 0x5245, RAGE128_GL, sRage128_GL }, // RE |
68 | | { 0x5246, RAGE128_GL, sRage128_GL }, // RF |
69 | | { 0x5247, RAGE128_GL, sRage128_GL }, // RG |
70 | | { 0x524B, RAGE128_VR, sRage128_VR }, // RK |
71 | | { 0x524C, RAGE128_VR, sRage128_VR }, // RL |
72 | | { 0x5345, RAGE128_VR, sRage128_VR }, // SE |
73 | | { 0x5346, RAGE128_VR, sRage128_VR }, // SF |
74 | | { 0x5347, RAGE128_VR, sRage128_VR }, // SG |
75 | | { 0x5348, RAGE128_VR, sRage128_VR }, // SH |
76 | | { 0x534B, RAGE128_GL, sRage128_GL }, // SK |
77 | | { 0x534C, RAGE128_GL, sRage128_GL }, // SL |
78 | | { 0x534D, RAGE128_GL, sRage128_GL }, // SM |
79 | | { 0x534E, RAGE128_GL, sRage128_GL }, // SN |
80 | | { 0x5446, RAGE128_PRO_ULTRA, sRage128_Pro_Ultra }, // TF |
81 | | { 0x544C, RAGE128_PRO_ULTRA, sRage128_Pro_Ultra }, // TL |
82 | | { 0x5452, RAGE128_PRO_ULTRA, sRage128_Pro_Ultra }, // TR |
83 | | { 0x5453, RAGE128_PRO_ULTRA, sRage128_Pro_Ultra }, // TS |
84 | | { 0x5454, RAGE128_PRO_ULTRA, sRage128_Pro_Ultra }, // TT |
85 | | { 0x5455, RAGE128_PRO_ULTRA, sRage128_Pro_Ultra }, // TU |
86 | | { 0, ATI_NONE, NULL } |
| 2 | If I have missed anything pleas fix it ;) Have taken names etc from Wikipedia and the Chip name from Haiku |