| 87 | |
| 88 | |
| 89 | '''TRAVIS and NUTMEG external encoders''' |
| 90 | {{{ |
| 91 | TRAVIS and NUTMEG are tricky |
| 92 | they are DP to LVDS and DP to VGA bridge chips |
| 93 | so you need to set up the digital encoder and transmitter and the bridge |
| 94 | also, starting with dce3, there is a table called AdjustPixelClock that you need to call to calculate the proper pixel clock |
| 95 | in some cases it will return hardcoded dividers or special pixel clocks |
| 96 | e.g., for clocks less than 60 mhz (IIRC), on dce3+ cards, you need to set the pixel clock to double the requested clock rate. then there is a special secondary divider that will split it back to the 1/2 rate |
| 97 | TRAVIS and NUTMEG are basically DP, but more complicated |
| 98 | you still have to do link training, etc. |
| 99 | |
| 100 | Ontario (PALM, E-350, E-450) has native VGA and LVDS, but some oems use the DP bridges anyway |
| 101 | llano (SUMO, SUMO2) has no native LVDS or VGA so it has to use the bridge chips |
| 102 | in this case, there will be two encoders associated with the LVDS or VGA connector |
| 103 | a UNIPHY/1/2 and NUTMEG or TRAVIS |
| 104 | if there is no external encoder, it's just regular LVDS |
| 105 | also, DP uses aux rather than i2c for DDC |
| 106 | the tricky part is, DP is backwards compatible with tmds, so the ddc pads can run in i2c or aux mode depending on what type of monitor is connected |
| 107 | so you have to check if the attached monitor is DP or TMDS, then use aux or i2c to read the EDID |
| 108 | }}} |