Opened 4 years ago

Closed 18 months ago

Last modified 18 months ago

#12695 closed bug (fixed)

[AboutSystem] identifies Core i3 as Core i5

Reported by: un_spacyar Owned by: nobody
Priority: normal Milestone: Unscheduled
Component: Applications/AboutSystem Version: R1/Development
Keywords: Cc:
Blocked By: Blocking:
Has a Patch: no Platform: All

Description (last modified by diver)

In a Dell 11z, with a Intel Core i3 CPU, AboutSystem identifies as "Core i5". The same applies for the Pulse app.

hrev50160 x88_gcc2

Change History (5)

comment:1 by diver, 4 years ago

Component: Applications/PulseApplications/AboutSystem
Description: modified (diff)
Summary: Pulse identifies Core i3 as Core i5[AboutSystem] identifies Core i3 as Core i5

comment:2 by axeld, 4 years ago

The output of the "sysinfo" Terminal command would be helpful.

comment:3 by un_spacyar, 4 years ago

Hello. There are the sysinfo output:

~> sysinfo
Kernel name: kernel_x86 built on: Mar 19 2016 20:24:27 version 0x1
4 Intel Core i5, revision 20655 running at 1197MHz

CPU #0: "Intel(R) Core(TM) i3 CPU       U 330  @ 1.20GHz"
        Raw CPUID: 0x020655,    Type 0, family 6, model 37, stepping 5, features 0xbfebfbff
                FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT
                PSE36 CFLUSH DS ACPI MMX FXSTR SSE SSE2 SS HTT TM PBE
        Extended Intel: 0x009ae3bd
                SSE3 DTES64 MONITOR DS-CPL VMX EST TM2 SSSE3 CX16 xTPR PDCM PCID SSE4.1 SSE4.2 POPCNT
        Extended AMD: type 0, family 0, model 0, stepping 0, features 0x28100000
                NX RDTSCP 64
        Power Management Features:

        L2 Data cache fully associative, 1 lines/tag, 64 bytes/line
        L2 cache: 0 KB, 1-way set associative, 0 lines/tag, 63 bytes/line

        Data TLB: 2M/4M-bytes pages, 4-way set associative, 32 entries
        Data TLB: 4k-byte pages, 4-way set associative, 64 entries
        Inst TLB: 2M/4M-bytes pages, fully associative, 7 entries
        L3 cache: 4096 KB, 12-way set associative, 64-bytes/line
        Inst TLB: 4K-bytes pages, 4-way set associative, 64 entries
        64-byte Prefetching
        L1 data cache: 32 KB, 8-way set associative, 64 bytes/line
        L2 cache: 256 KB (MLC), 8-way set associative, 64-bytes/line
        Shared 2nd-level TLB: 4K, 4-way set associative, 512 entries
        Unknown cache descriptor 0x09

CPU #1: "Intel(R) Core(TM) i3 CPU       U 330  @ 1.20GHz"
        Raw CPUID: 0x020655,    Type 0, family 6, model 37, stepping 5, features 0xbfebfbff
                FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT
                PSE36 CFLUSH DS ACPI MMX FXSTR SSE SSE2 SS HTT TM PBE
        Extended Intel: 0x009ae3bd
                SSE3 DTES64 MONITOR DS-CPL VMX EST TM2 SSSE3 CX16 xTPR PDCM PCID SSE4.1 SSE4.2 POPCNT
        Extended AMD: type 0, family 0, model 0, stepping 0, features 0x28100000
                NX RDTSCP 64
        Power Management Features:

        L2 Data cache fully associative, 1 lines/tag, 64 bytes/line
        L2 cache: 0 KB, 1-way set associative, 0 lines/tag, 63 bytes/line

        Data TLB: 2M/4M-bytes pages, 4-way set associative, 32 entries
        Data TLB: 4k-byte pages, 4-way set associative, 64 entries
        Inst TLB: 2M/4M-bytes pages, fully associative, 7 entries
        L3 cache: 4096 KB, 12-way set associative, 64-bytes/line
        Inst TLB: 4K-bytes pages, 4-way set associative, 64 entries
        64-byte Prefetching
        L1 data cache: 32 KB, 8-way set associative, 64 bytes/line
        L2 cache: 256 KB (MLC), 8-way set associative, 64-bytes/line
        Shared 2nd-level TLB: 4K, 4-way set associative, 512 entries
        Unknown cache descriptor 0x09

CPU #2: "Intel(R) Core(TM) i3 CPU       U 330  @ 1.20GHz"
        Raw CPUID: 0x020655,    Type 0, family 6, model 37, stepping 5, features 0xbfebfbff
                FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT
                PSE36 CFLUSH DS ACPI MMX FXSTR SSE SSE2 SS HTT TM PBE
        Extended Intel: 0x009ae3bd
                SSE3 DTES64 MONITOR DS-CPL VMX EST TM2 SSSE3 CX16 xTPR PDCM PCID SSE4.1 SSE4.2 POPCNT
        Extended AMD: type 0, family 0, model 0, stepping 0, features 0x28100000
                NX RDTSCP 64
        Power Management Features:

        L2 Data cache fully associative, 1 lines/tag, 64 bytes/line
        L2 cache: 0 KB, 1-way set associative, 0 lines/tag, 63 bytes/line

        Data TLB: 2M/4M-bytes pages, 4-way set associative, 32 entries
        Data TLB: 4k-byte pages, 4-way set associative, 64 entries
        Inst TLB: 2M/4M-bytes pages, fully associative, 7 entries
        L3 cache: 4096 KB, 12-way set associative, 64-bytes/line
        Inst TLB: 4K-bytes pages, 4-way set associative, 64 entries
        64-byte Prefetching
        L1 data cache: 32 KB, 8-way set associative, 64 bytes/line
        L2 cache: 256 KB (MLC), 8-way set associative, 64-bytes/line
        Shared 2nd-level TLB: 4K, 4-way set associative, 512 entries
        Unknown cache descriptor 0x09

CPU #3: "Intel(R) Core(TM) i3 CPU       U 330  @ 1.20GHz"
        Raw CPUID: 0x020655,    Type 0, family 6, model 37, stepping 5, features 0xbfebfbff
                FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT
                PSE36 CFLUSH DS ACPI MMX FXSTR SSE SSE2 SS HTT TM PBE
        Extended Intel: 0x009ae3bd
                SSE3 DTES64 MONITOR DS-CPL VMX EST TM2 SSSE3 CX16 xTPR PDCM PCID SSE4.1 SSE4.2 POPCNT
        Extended AMD: type 0, family 0, model 0, stepping 0, features 0x28100000
                NX RDTSCP 64
        Power Management Features:

        L2 Data cache fully associative, 1 lines/tag, 64 bytes/line
        L2 cache: 0 KB, 1-way set associative, 0 lines/tag, 63 bytes/line

        Data TLB: 2M/4M-bytes pages, 4-way set associative, 32 entries
        Data TLB: 4k-byte pages, 4-way set associative, 64 entries
        Inst TLB: 2M/4M-bytes pages, fully associative, 7 entries
        L3 cache: 4096 KB, 12-way set associative, 64-bytes/line
        Inst TLB: 4K-bytes pages, 4-way set associative, 64 entries
        64-byte Prefetching
        L1 data cache: 32 KB, 8-way set associative, 64 bytes/line
        L2 cache: 256 KB (MLC), 8-way set associative, 64-bytes/line
        Shared 2nd-level TLB: 4K, 4-way set associative, 512 entries
        Unknown cache descriptor 0x09

1168977920 bytes free      (used/max  833011712 / 2001989632)
                           (cached    622043136)
     63355 semaphores free (used/max       2181 /      65536)
      3843 ports free      (used/max        253 /       4096)
      3904 threads free    (used/max        192 /       4096)
      2025 teams free      (used/max         23 /       2048)

comment:5 by phoudoin, 18 months ago

Resolution: fixed
Status: newclosed

Patch merged in hrev51913. Thanks.

Last edited 18 months ago by phoudoin (previous) (diff)
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