#2804 closed bug (no change required)
booting fail on PATA disks using AHCI capable chipsets?
Reported by: | rudolfc | Owned by: | marcusoverhagen |
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Priority: | normal | Milestone: | |
Component: | Drivers/Disk | Version: | R1/pre-alpha1 |
Keywords: | boot-failure | Cc: | mattmadia@… |
Blocked By: | Blocking: | ||
Platform: | All |
Description
On my ASUS P5E3 sits a Marvell 88SE6111 PATA/SATA controller with one ultra DMA 100/133 connector, and one external SATA3.0 Gb/s port (sata on the go).
DMA fails on this chipset using the IDE busmanager, and reading and writing from/to disk both fail using 32bit PIO access (IDE and ATA busmanager). Both reading and writing succeed in 16bit PIO access.
I've been reading the net a bit, and from the looks of it this chip is a AHCI mimicking chipset. It would be able to run in AHCI mode even for the PATA bus, but it can also run in 'legacy' mode.
I get the feeling that the chip has to be 'told' to use legacy mode by accessing certain registers in a certain way/order. Looks like it's done here: http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob_plain;f=drivers/ata/pata_marvell.c
in routine: marvell_pre_reset();
So I guess something like this has to be done somewhere in a driver, or we should run this controller in AHCI mode for the PATA port. I expect (guess) that 32bit PIO I/O and DMA would work with the marvell_pre_reset() trick.???
Since Revision: R27884 the use of this adapter works in 16-bit PIO mode as the driver generic/ide_adapter has been modified to always use 16bit transfers for reading and writing in PIO mode.
This is a workaround until the ata (and ide) busmanagers can automatically fall-back from 32bit PIO mode to 16bit PIO mode on 32bit trouble (for the writing instance: no int after writing, but a timeout occurs).
(Note: I forced 16-bit writing in R27884, 16-bit reading was already forced ever since the driver was imported in svn over 4 years ago! I did test 32bit reading tough and it indeed failed.)
I tested different harddisks, all failed.
Hopefully I am making sense..
Greetings!
Rudolf.
Change History (10)
comment:1 by , 16 years ago
comment:2 by , 16 years ago
Component: | - General → Drivers/Disk |
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Owner: | changed from | to
comment:3 by , 16 years ago
Cc: | added |
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comment:4 by , 15 years ago
Do you still have access to the hardware? Can you retest with a more recent build of Haiku?
comment:5 by , 15 years ago
I still have access to the hardware, but it works as stated above, by forcing 16 bit read and write mode. AFAIK no-one extended stuff here so it's still as it is. Since booting succeeds one _could_ close this ticket..
Rudolf.
comment:6 by , 14 years ago
Blocking: | 7665 added |
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comment:7 by , 6 years ago
Keywords: | boot-failure added |
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comment:8 by , 6 years ago
Blocking: | 7665 removed |
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comment:9 by , 6 years ago
Resolution: | → no change required |
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Status: | new → closed |
comment:10 by , 5 years ago
Milestone: | R1 |
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Remove milestone for tickets with status = closed and resolution != fixed
Oh,
The ATA busmanager quits this way (on writing): -it (thinks it) sends all sectors it should, so repeatedly sectors are written code-wise. -after it completed writing (it thinks), it waits for drq_down, but fails: ata_exec_pio_transfer:ata_wait_for_drqdown failed ata_exec_pio_transfer:error